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FDC37B775 View Datasheet(PDF) - SMSC -> Microchip

Part NameDescriptionManufacturer
FDC37B775 Enhanced Super I/O Controller with Wake-Up Features and Consumer IR SMSC
SMSC -> Microchip SMSC
FDC37B775 Datasheet PDF : 196 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN
No./QFP
97
94
92
68:75
67
66
82
83
79
80
78
77
81
56
57
58
59
63
64
DESCRIPTION OF PIN FUNCTIONS
NAME
TOTAL SYMBOL
Data Set Ready 2/Sys Addr 15
1
nDSR2/
SA15
Data Carrier Detect 2/8042 P12
1
nDCD2/P12
Ring Indicator 2/8042 P16
1
nRI2/P16
PARALLEL PORT INTERFACE (17)
Parallel Port Data Bus
8
PD[0:7]
Printer Select
1
nSLCTIN
Initiate Output
1
nINIT
Auto Line Feed
1
nALF
Strobe Signal
1
nSTROBE
Busy Signal
1
BUSY
Acknowledge Handshake
1
nACK
Paper End
1
PE
Printer Selected
1
SLCT
Error at Printer
1
nERROR
KEYBOARD/MOUSE INTERFACE (6)
Keyboard Data
1
KDAT
Keyboard Clock
1
KCLK
Mouse Data
1
MDAT
Mouse Clock
1
MCLK
Keyboard Reset
1
KBDRST
(Note 3)
Gate A20
1
A20M
BUFFER
TYPE
I/I
I/IO24
I/IO24
IO24
OD24/O24
OD24/O24
OD24/O24
OD24/O24
I
I
I
I
I
IOD16
IOD16
IOD16
IOD16
O4
O4
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
For 12 bit addressing, SA0:SA11 only, nCS should be tied to GND. For 16 bit external
address qualification, address bits SA11:SA15 can be "ORed" together and applied to nCS.
The nCS pin functions as SA11 in full 16 bit Internal Address Qualification Mode. CR24.6
controls the FDC37B77x addressing modes.
The "n" as the first letter of a signal name indicates an "Active Low" signal.
KBDRST is active low.
The pull-down on this pin is always active including when the output driver is tristated
and regardless of the state of internal PWRGOOD.
The “activate” bit for the CIrCC is reset by VTR POR only. The VCC power-up default for
this pin is Logic “0”.
The “activate” bit for Serial Port 2 is reset by VTR POR only. The VCC power-up default for
this pin is Logic “1”.
8
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