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FDC37B773 View Datasheet(PDF) - SMSC -> Microchip

Part NameDescriptionManufacturer
FDC37B773 Enhanced Super I/O Controller with Wake-Up Features and Consumer IR SMSC
SMSC -> Microchip SMSC
FDC37B773 Datasheet PDF : 196 Pages
First Prev 181 182 183 184 185 186 187 188 189 190 Next Last
FIGURE 13B - EPP 1.9 DATA OR ADDRESS READ CYCLE TIMING PARAMETERS
NAME
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
t25
t26
t27
t28
DESCRIPTION
PDATA Hi-Z to Command Asserted
nIOR Asserted to PDATA Hi-Z
nWAIT Deasserted to Command Deasserted
(Note 1)
Command Deasserted to PDATA Hi-Z
Command Asserted to PDATA Valid
PDATA Hi-Z to nWAIT Deasserted
PDATA Valid to nWAIT Deasserted
nIOR Asserted to IOCHRDY Asserted
nWRITE Deasserted to nIOR Asserted (Note 2)
nWAIT Deasserted to IOCHRDY Deasserted
(Note 1)
IOCHRDY Deasserted to nIOR Deasserted
nIOR Deasserted to SDATA Hi-Z (Hold Time)
PDATA Valid to SDATA Valid
nWAIT Asserted to Command Asserted
Time Out
nWAIT Deasserted to PDATA Driven (Note 1)
nWAIT Deasserted to nWRITE Modified (Notes 1,2)
SDATA Valid to IOCHRDY Deasserted (Note 3)
Ax Valid to nIOR Asserted
nIOR Deasserted to Ax Invalid
nWAIT Asserted to nWRITE Deasserted
nIOR Deasserted to nIOW or nIOR Asserted
nWAIT Asserted to PDIR Set (Note 1)
PDATA Hi-Z to PDIR Set
nWAIT Asserted to PDATA Hi-Z (Note 1)
PDIR Set to Command
nWAIT Deasserted to PDIR Low (Note 1)
nWRITE Deasserted to Command
MIN
TYP MAX UNITS
0
30
ns
0
50
ns
60
180
ns
0
ns
0
ns
0
µs
0
ns
0
24
ns
0
ns
60
160
ns
0
ns
0
40
ns
0
75
ns
0
195
ns
10
12
µs
60
190
ns
60
190
ns
0
85
ns
40
ns
10
10
ns
0
185
ns
40
ns
60
185
ns
0
ns
60
180
ns
0
20
ns
60
180
ns
1
ns
Note 1: nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
Note 2: When not executing a write cycle, EPP nWRITE is inactive high.
Note 3: 85 is true only if t7 = 0.
181
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