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M48Z512AY-70PM6(2010) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M48Z512AY-70PM6
(Rev.:2010)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M48Z512AY-70PM6 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
M48Z512A
M48Z512AY, M48Z512AV
4 Mbit (512 Kbit x 8) ZEROPOWER® SRAM
Features
â–  Integrated, ultra low power SRAM, power-fail
control circuit, and battery
â–  Conventional SRAM operation; unlimited
WRITE cycles
â–  10 years of data retention in the absence of
power
â–  Automatic power-fail chip deselect and WRITE
protection
â–  Two WRITE protect voltages:
(VPFD = power-fail deselect voltage)
– M48Z512A:
VCC = 4.75 to 5.5 V, 4.5 V ≤ VPFD ≤ 4.75 V
– M48Z512AY:
VCC = 4.5 to 5.5 V, 4.2 V ≤ VPFD ≤ 4.5 V
– M48Z512AV:
VCC = 3.0 to 3.6 V, 2.8 V ≤ VPFD ≤ 3.0 V
M48Z512AV not for new design (see
M48Z512BV). Contact ST sales office for
availability.
â–  Battery internally isolated until power is applied
â–  Pin and function compatible with JEDEC
standard 512 K x 8 SRAMs
■ PMDIP32 is an ECOPACK® package
â–  RoHS compliant
– Lead-free second level interconnect
32
1
PMDIP32 module (PM)
Description
The M48Z512A/Y/V ZEROPOWER® RAM is a
non-volatile, 4,194,304-bit static RAM organized
as 524,288 words by 8 bits. The devices combine
an internal lithium battery, a CMOS SRAM and a
control circuit in a plastic, 32-pin DIP Module.
August 2010
Doc ID 5146 Rev 8
1/21
www.st.com
1
 

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