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FAN5019 View Datasheet(PDF) - Fairchild Semiconductor

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FAN5019 Datasheet PDF : 30 Pages
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PRODUCT SPECIFICATION
FAN5019
General Description
Note: The information in this section is intended to assist the
user in their design and understanding of the FAN5019
functionality. For clarity and ease of understanding, device
parameters have been included in the text. In the event of
discrepancies between values stated in this section and the
actual specification tables, the specification tables shall be
deemed correct.
Theory of Operation
The FAN5019 combines a multi-mode, fixed frequency
PWM control with multi-phase logic outputs for use in
2, 3 and 4 phase synchronous buck CPU core supply power
converters. If VID5 is pulled up to a voltage greater than
VTBLSEL, then the DAC code corresponds to VRM9.
Multi-phase operation is important for producing the high
currents and low voltages demanded by today’s microproces-
sors. Handling the high currents in a single-phase converter
would place high thermal demands on the components in the
system such as the inductors and MOSFETs. The internal
6-bit VID DAC conforms to Intel’s VRD/VRM 10
specifications.
The multi-mode control of the FAN5019 ensures a stable,
high performance topology for:
• Balancing currents and thermals between phases
• High speed response at the lowest possible switching
frequency and output decoupling
• Minimizing thermal switching losses due to lower
frequency operation
• Tight load line regulation and accuracy
• High current output from having up to 4 phase operation
• Reduced output ripple due to multi-phase cancellation
• PC board layout noise immunity
• Ease of use and design due to independent component
selection
• Flexibility in operation for tailoring design to low cost or
high performance
Number of Phases
The number of operational phases and their phase relation-
ship is determined by internal circuitry which monitors the
PWM outputs. Normally, the FAN5019 operates as a 4-phase
PWM controller. Grounding the PWM4 pin programs three
phase operation; grounding the PWM3 and PWM4 pins
programs 2-phase operation.
When the FAN5019 is initially enabled, the controller out-
puts a voltage on PWM3 and PWM4 that is approximately
550 mV. An internal comparator checks each pin’s voltage
versus a threshold of 400mV. If the pin is grounded, then it
will be below the threshold and the phase will be disabled.
The output impedance of the PWM pin is approximately
5k. Any external pull-down resistance connected to the
PWM pin should not be less than 25kto ensure proper
operation. The phase detection is made prior to starting
REV. 1.0.7 1/5/04
normal operation. After this time, if the PWM output was not
grounded, then it will operate normally. If the PWM output
was grounded, then it will remain off.
The PWM outputs become logic-level output devices once
normal operation starts, and are intended for driving external
gate drivers. Since each phase is monitored independently,
operation approaching 100% duty cycle is possible. Also,
more than one output can be on at a time for overlapping
phases.
Master Clock Frequency
The clock frequency of the FAN5019 is set with an external
resistor connected from the RT pin to ground. The frequency
follows the graph shown in TPC 1. To determine the fre-
quency per phase, the clock is divided by the number of
phases in use. If PWM4 is grounded, then divide the master
clock by 3 and if both PWM3 and 4 are grounded, then
divide by 2. If all phases are in use, divide by 4.
Output Voltage Differential Sensing
The FAN5019 combines differential sensing with a high
accuracy VID DAC and reference and a low offset error
amplifier to maintain a worst-case specification of ±10 mV
differential sensing error with a VID input of 1.600 V over its
full operating output voltage and temperature range. The
output voltage is sensed between the FB and FBRTN pins.
FB should be connected through a resistor to the regulation
point, usually the remote sense pin of the microprocessor.
FBRTN should be connected directly to the remote sense
ground point. The internal VID DAC and precision reference
are referenced to FBRTN, which has a typical current of
150µA, to allow accurate remote sensing. The internal error
amplifier compares the output of the DAC to the FB pin to
regulate the output voltage.
Output Current Sensing
The FAN5019 provides a dedicated current sense amplifier
(CSA) to monitor the total output current for proper voltage
positioning versus load current and for current limit detec-
tion. Sensing the load current at the output gives the total
average current being delivered to the load, which is an
inherently more accurate method than peak current detection
or sampling the current across a sense element such as the
low side MOSFET. This amplifier can be configured several
ways depending on the objectives of the system:
• Output inductor DCR sensing without thermistor for
lowest cost
• Output inductor DCR sensing with thermistor for
improved accuracy with tracking of inductor temperature
• Sense resistors for highest accuracy measurements
The positive input of the CSA is connected to the CSREF
pin, which is connected to the output voltage. The inputs to
the amplifier are summed together through resistors from the
sensing element (such as the switch node side of the output
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