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EX128-PTQ49PP View Datasheet(PDF) - Actel Corporation

Part Name
Description
Manufacturer
EX128-PTQ49PP
ACTEL
Actel Corporation ACTEL
EX128-PTQ49PP Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
eX Family FPGAs
eX Family Architecture
The eX family architecture uses a sea-of-modules
structure where the entire floor of the device is covered
with a grid of logic modules with virtually no chip area lost
to interconnect elements or routing. Interconnection
among these logic modules is achieved using Actels
patented metal-to-metal programmable antifuse
interconnect elements. Actels eX family provides two types
of logic modules, the register cell (R-cell) and the
combinatorial cell (C-cell).
The R-cell contains a flip-flop featuring asynchronous clear,
asynchronous preset, and clock enable (using the S0 and S1
lines) control signals (Figure 1). The R-cell registers
feature programmable clock polarity selectable on a
register-by-register basis. This provides additional flexibility
while allowing mapping of synthesized functions into the eX
FPGA. The clock source for the R-cell can be chosen from
either the hard-wired clock or the routed clock.
The C-cell implements a range of combinatorial functions
up to 5 inputs (Figure 2). Inclusion of the DB input and its
associated inverter function dramatically increases the
number of combinatorial functions that can be
implemented in a single module from 800 options in
previous architectures to more than 4,000 in the eX
architecture.
Module Organization
Actel has arranged all C-cell and R-cell logic modules into
horizontal banks called Clusters. The eX devices contain
one type of Cluster, which contains two C-cells and one
R-cell.
To increase design efficiency and device performance, Actel
has further organized these modules into SuperClusters
(Figure 3 on page 4). The eX devices contain one type of
SuperClusters, which are two-wide groupings of one type of
clusters.
Routed
Data Input S1
S0
PSET
DirectConnect
Input
D
Q
Y
Figure 1 • R-Cell
HCLK
CLKA,
CLKB,
Internal Logic
CKS
CKP
CLR
D0
D1
Y
D2
D3
Sa
Sb
DB
Figure 2 • C-Cell
A0 B0
A1 B1
v3.0
3
 

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