DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

EDS1232AASE View Datasheet(PDF) - Elpida Memory, Inc

Part Name
Description
Manufacturer
EDS1232AASE
Elpida
Elpida Memory, Inc Elpida
EDS1232AASE Datasheet PDF : 53 Pages
First Prev 31 32 33 34 35 36 37 38 39 40 Next Last
EDS1232AASE
Write command to Read command interval:
1. Same bank, same ROW address: When the read command is executed at the same ROW address of the same
bank as the preceding write command, the read command can be performed after an interval of no less than 1
clock. However, in the case of a burst write, data will continue to be written until one clock before the read
command is executed.
CLK
Command
WRIT READ
DQM
DQ (input)
DQ (output)
in A0
out B0 out B1 out B2
Column = A
Write Column = B
Read
/CAS Latency
Column = B
Dout
WRITE to READ Command Interval (1)
out B3
Burst Write Mode
CL = 2
BL = 4
Bank 0
CLK
Command
WRIT
READ
DQM
DQ (input)
in A0
in A1
DQ (output)
out B0 out B1 out B2 out B3
Column = A
Write
Column = B
Read
/CAS Latency
Column = B
Dout
WRITE to READ Command Interval (2)
Burst Write Mode
CL = 2
BL = 4
Bank 0
2. Same bank, different ROW address: When the ROW address changes, consecutive read commands cannot be
executed; it is necessary to separate the two commands with a precharge command and a bank active
command.
3. Different bank: When the bank changes, the read command can be performed after an interval of no less than 1
clock, provided that the other bank is in the bank active state. However, in the case of a burst write, data will
continue to be written until one clock before the read command is executed (as in the case of the same bank and
the same address).
Data Sheet E0350E20 (Ver. 2.0)
35
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]