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DM74LS174 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
DM74LS174
Fairchild
Fairchild Semiconductor Fairchild
DM74LS174 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
DM74LS175 Recommended Operating Conditions
Symbol
Parameter
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
IOH
HIGH Level Output Current
IOL
LOW Level Output Current
fCLK
Clock Frequency (Note 8)
fCLK
Clock Frequency (Note 9)
tW
Pulse Width
(Note 10)
tSU
Data Setup Time (Note 10)
tH
Data Hold Time (Note 10)
tREL
Clear Release Time (Note 10)
TA
Free Air Operating Temperature
Note 8: CL = 15 pF, RL = 2 k, TA = 25°C and VCC = 5V.
Note 9: CL = 50 pF, RL = 2 k, TA = 25°C and VCC = 5V.
Note 10: TA = 25°C and VCC = 5V.
Clock
Clear
Min
Nom
Max
Units
4.75
5
5.25
V
2
V
0.8
V
0.4
mA
8
mA
0
30
MHz
0
25
MHz
20
ns
20
20
ns
0
ns
25
ns
0
70
°C
DM74LS175 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Typ
Min
Max
(Note 11)
Units
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
VCC = Min, IOH = Max
Output Voltage
VIL = Max, VIH = Min
VOL
LOW Level
VCC = Min, IOL = Max
Output Voltage
VIL = Max, VIH = Min
IOL = 4 mA, VCC = Min
II
Input Current @ Max Input Voltage VCC = Max, VI = 7V
IIH
HIGH Level Input Current
VCC = Max, VI = 2.7V
IIL
LOW Level
VCC = Max
Input Current
VI = 0.4V
Clock
Clear
Data
1.5
V
2.7
3.4
V
0.35
0.5
V
0.25
0.4
0.1
mA
20
µA
0.4
0.4
mA
0.36
IOS
Short Circuit Output Current
ICC
Supply Current
Note 11: All typicals are at VCC = 5V, TA = 25°C.
VCC = Max (Note 12)
VCC = Max (Note 13)
20
100
mA
11
18
mA
Note 12: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 13: With all outputs OPEN and 4.5V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5V applied to the clock
input.
DM74LS175 Switching Characteristics
at VCC = 5V and TA = 25°C (See Section 1 for Test Waveforms and Output Load)
From (Input)
Symbol
Parameter
To (Output)
fMAX
tPLH
tPHL
tPLH
tPHL
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Clock to Q or Q
Clock to Q or Q
Clear to Q
Clear to Q
RL = 2 k
CL = 15 pF
CL = 50 pF
Min
Max
Min
Max
30
25
30
32
30
36
25
29
35
42
Units
MHz
ns
ns
ns
ns
5
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