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DM74AS646NTX View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
DM74AS646NTX
Fairchild
Fairchild Semiconductor Fairchild
DM74AS646NTX Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
DM74AS646 Switching Characteristics
Symbol
Parameter
Conditions
From
(Input)
To
Min
(Output)
fMAX
tPLH
tPHL
Maximum Clock
Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
VCC = 4.5V to 5.5V,
R1 = R2 = 500
CL = 50 pF
CBA or CAB
90
2
A or B
2
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
A or B
2
B or A
1
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
SBA or SAB
(Note 6)
2
A or B
2
tPZH
Output Enable Time
2
to HIGH Level Output
tPZL
Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
Enable G
3
A or B
2
tPLZ
Output Disable Time
2
from LOW Level Output
tPZH
Output Enable Time
3
to HIGH Level Output
tPZL
Output Enable Time
to LOW Level Output
tPHZ
Output Disable Time
from HIGH Level Output
3
DIR
A or B
2
tPLZ
Output Disable Time
2
from LOW Level Output
Note 6: These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Max
8.5
9
9
7
11
9
9
14
9
9
16
18
10
10
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
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