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DM74AS280M View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
DM74AS280M
Fairchild
Fairchild Semiconductor Fairchild
DM74AS280M Datasheet PDF : 6 Pages
1 2 3 4 5 6
October 1986
Revised March 2000
DM74AS280
9-Bit Parity Generator/Checker
General Description
These universal, 9-bit parity generators/checkers utilize
advanced Schottky high performance circuitry and feature
odd/even outputs to facilitate operation of either odd or
even parity applications. The word length capability is eas-
ily expanded by cascading.
The DM74AS280 can be used to upgrade the performance
of most systems utilizing the ’180 parity generator/checker.
Although the DM74AS280 is implemented without
expander inputs, the corresponding function is provided by
the availability of an input at pin 4 and no internal connec-
tion at pin 3. This permits the DM74AS280 to be substi-
tuted for the ’180 in existing designs to produce identical
function even if DM74AS280s are mixed with existing
’180s.
Features
s Generates either odd or even parity for nine data lines
s Inputs are buffered to lower the drive requirements
s Can be used to upgrade existing systems using MSI
parity circuits
s Cascadable for N-bits
s Advanced oxide-isolated, ion-implanted Schottky
TTL process
s Switching specifications at 50 pF
s Switching specifications guaranteed over full
temperature and VCC range
Ordering Code:
Order Number Package Number
Package Description
DM74AS280M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
DM74AS280N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Number of Inputs (A thru I)
that are HIGH
0, 2, 4, 6, 8
1, 3, 5, 7, 9
L = LOW State
H = HIGH State
Outputs
Even
Odd
H
L
L
H
© 2000 Fairchild Semiconductor Corporation DS006303
www.fairchildsemi.com
 

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