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DAC8412FPCZ View Datasheet(PDF) - Analog Devices

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Description
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DAC8412FPCZ Datasheet PDF : 20 Pages
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Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = +25°C, unless otherwise noted.
Table 3.
Parameter
VSS to VDD
VSS to VLOGIC
VLOGIC to DGND
VSS to VREFL
VREFH to VDD
VREFH to VREFL
Current into Any VSS pin
Digital Input Voltage to DGND
Digital Output Voltage to DGND
Operating Temperature Range
EP, FP, FPC
AT, BT, BTC
Junction Temperature
Storage Temperature Range
Power Dissipation Package
Lead Temperature
Soldering
Rating
−0.3 V, +33.0 V
−0.3 V, +33.0 V
−0.3 V, +7.0 V
−0.3 V, +VSS − 2.0 V
+2.0 V, +33.0 V
+2.0 V, VSS − VDD
±15 mA
−0.3 V, VLOGIC + 0.3 V
−0.3 V, +7.0 V
−40°C to +85°C
−55°C to +125°C
150°C
−65°C to +150°C
1000 mW
JEDEC Industry Standard
J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
DAC8412/DAC8413
THERMAL RESISTANCE
θJA is specified for the worst-case mounting conditions, that is, a
device in socket.
Table 4. Thermal Resistance
Package Type
28-Lead Plastic DIP (PDIP)
28-Terminal Ceramic Leadless Chip Carrier (LLC)
28-Lead Plastic Leaded Chip Carrier (PLLC)
28-Lead Ceramic Dual In-Line Package (CERDIP)
θJA θJC Unit
48 22 °C/W
70 28 °C/W
63 25 °C/W
51 9 °C/W
ESD CAUTION
Rev. G | Page 7 of 20
 

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