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DAC8412AT View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
DAC8412AT Datasheet PDF : 20 Pages
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Data Sheet
DAC8412/DAC8413
Parameter
Write Data Setup
Write Data Hold
Load Data Pulse Width
Reset Pulse Width
Chip Select Read Pulse Width
Read Data Hold
Read Data Setup
Data to High-Z
Chip Select to Data
SUPPLY CHARACTERISTICS
Power Supply Sensitivity
Positive Supply Current
Negative Supply Current
Power Dissipation
Symbol
tWDS
tWDH
tLDW
tRESET
tRCS
tRDH
tRDS
tDZ
tCSD
Conditions
tWCS = 150 ns
tWCS = 150 ns
tRCS = 170 ns
tRCS = 170 ns
CL = 10 pF
CL = 100 pF
PSS
IDD
ISS
VSS = −5.0 V
PDISS
VSS = 0 V
VSS = −5.0 V
Min
Typ
20
0
180
150
170
20
0
100
7
−10
60
110
1 All supplies can be varied ±5%, and operation is guaranteed. Device is tested with VDD = 4.75 V.
2 For single-supply operation only (VREFL = 0.0 V, VSS = 0.0 V). Due to internal offset errors, INL and DNL are measured beginning at 0x005.
3 Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.
4 All parameters are guaranteed by design.
5 All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
Max
200
320
12
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ppm/V
mA
mA
mW
mW
CS
R/W
A0/A1
DATA
OUT
tRCS
tRDS
tRDH
tAS
tAH
HIGH-Z
DATA VALID
tDZ
HIGH-Z
tCSD
Figure 3. Data Output (Read Timing)
CS
tWS
R/W
tAS
A0/A1
tWCS
tWH
tAH
LDAC
DATA IN
tLS
tWDS
RESET
tRESET
tLH
tLDW
tWDH
Figure 4. Data Write (Input and Output Registers) Timing
Rev. G | Page 5 of 20
 

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