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DAC5675 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
DAC5675 14-BIT, 400-MSPS DIGITAL-TO-ANALOG CONVERTER TI
Texas Instruments TI
DAC5675 Datasheet PDF : 31 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DAC5675
SLAS352C − DECEMBER 2001 − REVISED AUGUST 2004
detailed description (continued)
supply inputs
The DAC5675 comprises separate analog and digital supplies, i.e., AVDD and DVDD respectively. These supply
inputs can be set independently from 3.6 V down to 3.15 V.
DAC transfer function
The DAC5675 delivers complementary output currents IOUT1 and IOUT2. The DAC supports straight binary
coding, with D13 being the MSB and D0 the LSB (For ease of notation we denote D13..D10 as the logical bit
equivalent of the complementary LVDS inputs D[13..0]A and D[13..0]B). Output current IOUT1 equals the
approximate full-scale output current when all input bits are set high, i.e., the binary input word has the decimal
representation 16383. Full-scale output current flows through terminal IOUT2 when all input bits are set low
(mode 0, straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:
IOUT1 = IO(FS) – IOUT2
where IO(FS) is the full-scale output current. The output currents can be expressed as:
IOUT1
+
IO(FS) CODE
16384
IOUT2 + IO(FS)
(16383–CODE)
16384
where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive
a load RL. RL is the combined impedance for the termination resistance and/or transformer load resistance,
RLOAD (see Figures 11 and 12). This would translate into single-ended voltages VOUT1 and VOUT2 at terminal
IOUT1 and IOUT2, respectively, of:
VOUT1 + IOUT1
CODE
RL +
IO(FS)
16384
RL
VOUT2 + IOUT2
RL
+
(16383
*
CODE)
16384
IO(FS)
RL
The differential output voltage VOUT(DIFF) can thus be expressed as:
VOUT(DIFF) + VOUT1 * VOUT2 +
(2CODE * 16383)
16384
IO(FS)
RL
The latter equation shows that applying the differential output results in doubling of the signal power delivered
to the load. Since the output currents IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Note that care should be taken not to exceed the compliance voltages at node IOUT1
and IOUT2, which leads to increased signal distortion.
10
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