DAC08Q2/883C View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
DAC08Q2/883C
Analog Devices
DAC08Q2/883C Datasheet PDF : 12 Pages
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DAC08
WAFER TEST LIMITS (@ VS = ؎15 V, IREF = 2.0 mA; TA = 25؇C, unless otherwise noted. Output characteristics apply to both
IOUT and IOUT .)
Parameter
Symbol
Conditions
DAC08N
Limit
DAC08G
Limit
DAC08GR
Limit
Unit
Resolution
Monotonicity
Nonlinearity
Output Voltage
Compliance
Full-Scale Current
Full-Scale Symmetry
Zero-Scale Current
Output Current Range
Logic Input “0”
Logic Input “1”
Logic Input Current
Logic “0”
Logic “1”
Logic Input Swing
Reference Bias Current
Power Supply
Sensitivity
Power Supply Current
Power Dissipation
NL
VOC
IFS4 or
IFS2
IFSS
IZS
IFS1 or
IFS2
VIL
VIH
IIL
IIH
VIS
I15
PSSIFS+
PSSIFS–
I+
PD
Full-Scale Current
Change < 1/2 LSB
VREF = 10.000 V
R14, R15 = 5.000 kΩ
V– = –10 V,
VREF = +15 V
V– = –12 V,
VREF = +25 V
R14, R15 = 5.000 kΩ
VLC = 0 V
VIN = –10 V to +0.8 V
VIN = +2.0 V to +18 V
V– = –15 V
V+ = +4.5 V to +18 V
V– = –4.5 V to –18 V
IREF = 1.0 mA
VS = ± 15 V
IREF ≤ 2.0 mA
VS = ± 15 V
IREF ≤ 2.0 mA
8
8
± 0.1
+18
–10
2.04
1.94
±8
2
2.1
4.2
0.8
2
± 10
± 10
+18
–10
–3
0.01
3.8
–7.8
174
8
8
± 0.19
+18
–10
2.04
1.94
±8
4
2.1
4.2
0.8
2
± 10
± 10
+18
–10
–3
0.01
3.8
–7.8
174
8
8
± 0.39
+18
–10
2.04
1.94
± 16
4
2.1
4.2
0.8
2
± 10
± 10
+18
–10
–3
0.01
3.8
–7.8
174
Bits min
Bits min
% FS max
V max
V min
mA max
mA min
µA max
µA max
mA min
mA min
V max
V min
µA max
µA max
V max
V min
µA max
% FS/% V max
mA max
µA max
mW max
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. B
–5–
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