15 to 26
44 to 37
27 to 32
35 to 36
50 to 46
10 to 13
1 to 4
14, 33, 45
Grid1 to Grid6
LED1 to LED5
Key1 to Key4
SW1 to SW4
Inputs serial data at rising edge of shift clock, starting from lower
Outputs serial data at falling edge of shift clock, starting from
lower bit. This is N-ch open-drain output pin.
Initializes serial interface at rising or falling edge to make
PD16311 waiting for reception of command. Data input after
STB has fallen is processed as command. While command data
is processed, current processing is stopped, and serial interface
is initialized. While STB is high, CLK is ignored.
Reads serial data at rising edge, and outputs data at falling edge.
Connect resistor for determining oscillation frequency to this pin.
Segment output pins (Dual function as key source)
High-voltage output (grid) Grid output pins
These pins are selectable for segment or grid output.
CMOS output. +20 mA max.
Key data input
Data input to these pins is latched at end of display cycle.
These pins constitute 4-bit general-purpose input port.
5 V 10 %
Connect this pin to GND of system.
VDD 35 V max.
Be sure to leave this pin open (this pin is at VDD level).