CY7C1354A View Datasheet(PDF) - Cypress Semiconductor
Part Name
Description
Manufacturer
CY7C1354A Datasheet PDF : 28 Pages
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Pin Descriptions—512K × 18 (continued)
512K × 18
TQFP Pins
512K × 18 Pin
PBGA Pins Name
1-3, 6, 7, 25, 4A, 1B, 7B, 1C, NC
28-30, 7C, 2D, 4D, 7D,
51-53, 56, 57, 1E, 6E, 2F, 1G,
75, 78, 79, 84, 6G, 2H, 7H, 3J,
95, 96
5J, 1K, 6K, 2L,
4L, 7L, 6M, 2N,
7N, 1P, 6P, 1R,
7R, 1T, 4T, 6U
Type
–
CY7C1354A
CY7C1356A
Pin Description
No Connect: These signals are not internally connected. It can be left
floating or be connected to VCC or to GND.
Partial Truth Table for Read/Write[2]
Read
No Write
Write Byte a (DQa)[3]
Write Byte b (DQb)[3]
Write Byte c (DQc)[3]
Write Byte d (DQd}[3]
Write all bytes
Function
WEN
H
L
L
L
L
L
L
BWa
X
H
L
H
H
H
L
BWb
X
H
H
L
H
H
L
BWc[4]
X
H
H
H
L
H
L
BWd[4]
X
H
H
H
H
L
L
Interleaved Burst Address Table
(MODE = VCC or NC)
First
Address
(external)
Second
Address
(internal)
Third
Address
(internal)
A...A00
A...A01
A...A10
A...A11
A...A01
A...A00
A...A11
A...A10
A...A10
A...A11
A...A00
A...A01
Fourth
Address
(internal)[5]
A...A11
A...A10
A...A01
A...A00
Linear Burst Address Table
(MODE = VSS)
First
Address
(external)
Second
Address
(internal)
Third
Address
(internal)
A...A00
A...A01
A...A10
A...A11
A...A01
A...A10
A...A11
A...A00
A...A10
A...A11
A...A00
A...A01
Notes:
2. L means logic LOW. H means logic HIGH. X means Don’t Care.
3. Multiple bytes may be selected during the same cycle.
4. BWc and BWd apply to 256K × 36 device only.
5. Upon completion of the Burst sequence, the counter wraps around to its initial state and continues counting.
Fourth
Address
(internal)[5]
A...A11
A...A00
A...A01
A...A10
Document #: 38-05161Rev. *E
Page 8 of 28
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