Switching Waveforms (continued)
CEN Timing[42, 45, 47, 48, 49]
CLK
tS
CCKEEN#
tS
RW/W EN#
tS
ADDRESS A1
tS
BBWWa#a,, BBWWbb,#
BWc, BWd
tS
CCEE#
tS
AADDV/LD#
tKC
tKL
tH
tH
tH
A2
tH
tH
tH
tKH
A3
CY7C1354A
CY7C1356A
A4
A5
OOEE#
tKQ
tKQHZ
DATA Out (Q)
tKQLZ
Q(A1)
tKQX
tSD tHD
Q(A3)
DATA In (D)
D(A2)
Note:
49. CEN when sampled HIGH on the rising edge of clock will block that L-H transition of the clock from propagating into the SRAM. The part will behave as if the L-H
clock transition did not occur. All internal registers in the SRAM will retain their previous states.
Document #: 38-05161Rev. *E
Page 23 of 28