CXA1779 View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXA1779

Predriver for High Resolution Computer Displays

Sony Semiconductor 

CXA1779P

Description of Operation

1. Contrast control

The contrast for RGB IN (Pins 2, 5 and 8) input signals is adjusted using a DC externally input to the PIX

pin (Pin 12). In addition, the contrast for each RGB channel can be adjusted independently using a DC

externally input to the DRV pins (Pins 3, 6 and 9). (See Graphs 1 and 2.)

2. Pedestal clamp and brightness control

The pedestal clamp clamps the pedestal level when the CLP pin (Pin 14) is high. The RGB IN pin voltage at

the pedestal is approximately 3.2V when the pedestal is clamped. The CLP pin threshold level is 3V for VH

and 1.5V for VL. (See Fig. 2.)

Using a DC externally input to the R, G and B BRT pins (Pins 26, 22 and 18), the brightness control

samples and holds the pedestal with the capacitance connected to the RGB SH pins (Pins 27, 23 and 19)

when the CLP pin (Pin 14) is high, thereby adjusting the pedestal level of the R, G and B channels. (See

Graph 3.)

3. Blanking additional function

Output is blanked when the BLK pin (Pin 16) is high. The BLK pin threshold level is 3V for VH and 1.5V for

VL. See the Example of Input/Output Signals for output signal levels. The output signal is 0.3V during the

blanking interval. (See Figs. 4 and 5.)

–7–

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