CX81801-7x/8x SmartV.XX Modem Data Sheet
Table 3-2. CX81801 Modem Pin Signal Definitions for Parallel Interface (PARIF = High) (Continued)
Label
HCS# (PD4)
HWT# (PD5)
HRD# (PD6)
HINT (PB7)
HA0-HA2
(PD0-PD2)
HD0-HD7
(PC0-PC7)
Pin
I/O
11
I
12
I
13
I
109
O
6-8
I
122-123, 125- I/O
127, 1, 3-4
I/O Type
Signal Name/Description
Parallel Host Interface
It
Host Bus Chip Select. HCS# input low enables the MCU host
bus interface.
Ithpu
Host Bus Write. HWT# is an active low, write control input. When
HCS# is low, HWT# low allows the host to write data or control
words into a selected MCU register.
Ithpu
Host Bus Read. HRD# is an active low, read control input. When
HCS# is low, HRD# low allows the host to read status information
or data from a selected MCU register.
It/Ot8
Host Bus Interrupt. HINT output is set high when the receiver
error flag, received data available, transmitter holding register
empty, or modem status interrupt is asserted. HINT is reset low
upon the appropriate interrupt service or master reset operation.
Ithpd/Ot2
Host Bus Address Lines 0-2. During a host read or write
operation with HCS# low, HA0-HA2 select an internal MCU
16550A-compatible register.
Ith/Ot8
Host Bus Data Lines 0-7. HD0-HD7 are three-state input/output
lines providing bidirectional communication between the host and
the MCU. Data, control words, and status information are
transferred over HD0-HD7.
3-10
Conexant
102199B