AD9887 View Datasheet(PDF) -

AD9887

Table IX. Control Register Map (continued)

Read and

Hex

Write or

Default

Address Read Only Bits Value

Register

Name

Function

1BH

R/W

7:0 00000000 Test Register Must be set to 00010000 for proper operation.

1CH

R/W

1DH

RO

7:0 000001** 4:2:2 Control Bits [7:2]—Must be set to 011011** for proper operation.

******1*

Bit 1—Must be set to default for proper operation.

*******1

Bit 0—Output Format Mode Select

Logic 1 = 4:4:4 mode

Logic 0 = 4:2:2 mode

7:0

Test Register Reserved for future use.

1EH

RO

7:0

Test Register Reserved for future use.

1FH

RO

7:0

Test Register Reserved for future use.

NOTE

1The AD9887 only updates the PLL divide ratio when the LSBs are written to (Register 02h).

–28–

REV. 0

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