DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

M48T37Y-70MH1F View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
M48T37Y-70MH1F Datasheet PDF : 30 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
M48T37Y, M48T37V
Operation modes
Table 4. WRITE mode AC characteristics
Symbol
Parameter(1)
M48T37Y
–70
M48T37V
–100
Unit
Min Max Min Max
tAVAV
WRITE cycle time
70
100
ns
tAVWL Address valid to WRITE enable low
0
0
ns
tAVEL Address valid to chip enable low
0
0
ns
tWLWH WRITE enable pulse width
50
80
ns
tELEH Chip enable low to chip enable high
55
80
ns
tWHAX WRITE enable high to address transition
0
10
ns
tEHAX Chip enable high to address transition
0
10
ns
tDVWH Input valid to WRITE enable high
30
50
ns
tDVEH Input valid to chip enable high
30
50
ns
tWHDX WRITE enable high to input transition
5
5
ns
tEHDX Chip enable high to input transition
tWLQZ(2)(3) WRITE enable low to output Hi-Z
5
5
ns
25
50
ns
tAVWH Address valid to WRITE enable high
60
80
ns
tAVEH Address valid to chip enable high
60
80
ns
tWHQX(2)(3) WRITE enable high to output transition
5
10
ns
1. Valid for ambient operating temperature: TA = 0 to 70 °C or –40 to 85 °C; VCC = 4.5 to 5.5 V or 3.0 to 3.6 V
(except where noted).
2. CL = 5 pF.
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
2.3
Note:
Data retention mode
With valid VCC applied, the M48T37Y/V operates as a conventional BYTEWIDEâ„¢ static
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs
become high impedance, and all inputs are treated as “Don't care.â€
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below VPFD (min), the
user can be assured the memory will be in a write protected state, provided the VCC fall time
is not less than tF.
The M48T37Y/V may respond to transient noise spikes on VCC that reach into the deselect
window during the time the device is sampling VCC. Therefore, decoupling of the power
supply lines is recommended. When VCC drops below VSO, the control circuit switches
power to the internal battery which preserves data and powers the clock. The internal button
cell will maintain data in the M48T37Y/V for an accumulated period of at least 7 years at
room temperature when VCC is less than VSO. As system power returns and VCC rises
above VSO, the battery is disconnected and the power supply is switched to external VCC.
Normal RAM operation can resume tREC after VCC reaches VPFD (max).
For more information on battery storage life refer to the application note AN1012.
Doc ID 7019 Rev 9
11/30
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]