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DM74S373 Ver la hoja de datos (PDF) - Fairchild Semiconductor

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DM74S373 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops Fairchild
Fairchild Semiconductor Fairchild
DM74S373 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
DM74S374 Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Symbol
Parameter
Conditions
Min
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
Output Voltage
VCC = Min, IOH = Max
2.4
VIL = Max, VIH = Min
VOL
LOW Level
VCC = Min, IOL = Max
Output Voltage
VIH = Min, VIL = Max
II
Input Current @ Max Input Voltage
VCC = Max, VI = 5.5V
IH
HIGH Level Input Current
VCC = Max, VI = 2.7V
IIL
LOW Level Input Current
VCC = Max, VI = 0.5V
IOZH
Off-State Output Current with
VCC = Max, VO = 2.4V
HIGH Level Output Voltage Applied
VIH = Min, VIL = Max
IOZL
Off-State Output Current with
VCC = Max, VO = 0.5V
LOW Level Output Voltage Applied
VIH = Min, VIL = Max
IOS
Short Circuit Output Current
VCC = Max (Note 14)
40
ICC
Supply Current
VCC = Max
Outputs HIGH
Outputs LOW
Outputs Disabled
Note 13: All typicals are at VCC = 5V, TA = 25°C.
Note 14: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Typ
(Note 13)
3.2
90
Max
1.2
0.5
1
50
250
50
50
100
110
140
160
DM74S374 Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
fMAX
tPLH
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPZH
Output Enable Time to
HIGH Level Output
tPZL
Output Enable Time to
LOW Level Output
tPHZ
Output Disable Time from
HIGH Level Output (Note 15)
tPLZ
Output Disable Time from
LOW Level Output (Note 15)
Note 15: CL = 5 pF
From (Input)
To (Output)
Clock to Any Q
Clock to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
RL = 280
CL = 15 pF
CL = 50 pF
Min
Max
Min
Max
75
75
15
15
17
20
15
17
18
23
9
12
Units
V
V
V
mA
µA
µA
µA
µA
mA
mA
Units
MHz
ns
ns
ns
ns
ns
ns
5
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