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DM74S373WM Ver la hoja de datos (PDF) - Fairchild Semiconductor

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DM74S373WM 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops Fairchild
Fairchild Semiconductor Fairchild
DM74S373WM Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
DM74S373 Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPZH
Enable Time to
HIGH Level Output
tPZL
Output Enable Time to
LOW Level Output
tPHZ
Output Disable Time to
HIGH Level Output (Note 8)
tPLZ
Output Disable Time to
LOW Level Output (Note 8)
Note 8: CL = 5 pF
From (Input)
To (Output)
Data to Any Q
Data to Any Q
Enable to Any Q
Enable to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
Output Control to Any Q
RL = 280
CL = 15 pF
CL = 50 pF
Min
Max
Min
Max
12
14
12
16
14
14
18
21
15
17
18
23
9
12
DM74S374 Recommended Operating Conditions
Symbol
Parameter
Min
VCC
Supply Voltage
4.75
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
IOH
HIGH Level Output Current
IOL
LOW Level Output Current
fCLK
Clock Frequency (Note 9)
0
fCLK
Clock Frequency (Note 10)
0
tW
Pulse Width
Clock HIGH
6
(Note 9)
Clock LOW
7.3
Pulse Width
Clock HIGH
15
(Note 10)
Clock LOW
15
tSU
Data Setup Time (Note 11)(Note 12)
5
tH
Data Hold Time (Note 11)(Note 12)
2
TA
Free Air Operating Temperature
0
Note 9: CL = 15 pF, RL = 280, TA = 25°C and VCC = 5V.
Note 10: CL = 50 pF, RL = 280, TA = 25°C and VCC = 5V.
Note 11: The symbol () indicates the rising edge of the clock pulse is used for reference.
Note 12: TA = 25°C and VCC = 5V.
Nom
5
Max
5.25
0.8
6.5
20
75
75
70
Units
ns
ns
ns
ns
ns
ns
ns
ns
Units
V
V
V
mA
mA
MHz
MHz
ns
ns
ns
°C
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