7. Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see Figure 7-4 on page 9). Data changes during SCL high periods will indicate
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see Figure 7-5 on page 9).
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see Figure 7-5 on page 9).
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The AT24CS01/02 features a low-power standby mode which is enabled upon power-up as well as after
the receipt of the Stop bit and the completion of any internal operations.
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by
following these steps:
1. Create a start bit condition.
2. Clock nine cycles.
3. Create another start bit followed by stop bit condition as shown in Figure 7-1.
The device is ready for next communication after above steps have been completed.
Figure 7-1. Software reset
Dummy Clock Cycles
Atmel AT24CS01/02 [PRELIMINARY DATASHEET]