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AT24CS01-SSUM-T View Datasheet(PDF) - Atmel Corporation

Part NameDescriptionManufacturer
AT24CS01-SSUM-T I2C-Compatible (2-wire) Serial EEPROM with a Unique, Factory Programmed 128-bit Serial Number Atmel
Atmel Corporation Atmel
AT24CS01-SSUM-T Datasheet PDF : 23 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
5. Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge
clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the
AT24CS01/02. As many as eight 1-Kbit or 2-Kbit devices may be addressed on a single bus system. For more detail, see
section, “Device Addressing” on page 10.
Write Protect (WP): AT24CS01/02 has a Write Protect (WP) pin that provides hardware data protection. When the Write
Protect pin is connected to ground (GND), normal read/write operations to the full array are possible. When the Write
Protect pin is connected to VCC, all write operations to the memory are inhibited but read operations are still possible.
This operation is summarized in Table 5-1 below.
Table 5-1. Write Protect
WP Pin
Status
At VCC
At GND
Part of the Array Protected
Atmel AT24CS01/02
Full Array
Normal Read/Write Operations
Atmel AT24CS01/02 [PRELIMINARY DATASHEET]
4
8815A–SEEPR–6/12
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