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APA1000-TQG144ES View Datasheet(PDF) - Actel Corporation

Part NameAPA1000-TQG144ES ACTEL
Actel Corporation ACTEL
DescriptionProASICPLUS® Flash Family FPGAs
APA1000-TQG144ES Datasheet PDF : 178 Pages
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ProASICPLUS Flash Family FPGAs
Power-Up Sequencing
While ProASICPLUS devices are live at power-up, the order
of VDD and VDDP power-up is important during system
start-up. VDD should be powered up simultaneously with
VDDP on ProASICPLUS devices. Failure to follow these
guidelines may result in undesirable pin behavior during
system start-up. For more information, refer to Actel’s
Power-Up Behavior of ProASICPLUS Devices application
note.
LVPECL Input Pads
In addition to standard I/O pads and power pads,
ProASICPLUS devices have a single LVPECL input pad on
both the east and west sides of the device, along with
AVDD and AGND pins to power the PLL block. The
LVPECL pad cell consists of an input buffer (containing a
low voltage differential amplifier) and a signal and its
complement, PPECL (I/P) (PECLN) and NPECL (PECLREF).
The LVPECL input pad cell differs from the standard I/O
cell in that it is operated from VDD only.
Since it is exclusively an input, it requires no output
signal, output enable signal, or output configuration
bits. As a special high-speed differential input, it also
does not require pull-ups. Recommended termination
for LVPECL inputs is shown in Figure 2-7. The LVPECL pad
cell compares voltages on the PPECL (I/P) pad (as
illustrated in Figure 2-8) and the NPECL pad and sends
the results to the global MUX (Figure 2-11 on page 2-11).
This high-speed, low-skew output essentially controls the
clock conditioning circuit.
LVPECLs are designed to meet LVPECL JEDEC receiver
standard levels (Table 2-5).
PPECL
Z 0= 50 Ω
From LVPECL Driver
Z 0= 50 Ω
NPECL
+
R = 100 Ω
_
Figure 2-7 • Recommended Termination for LVPECL Inputs
Data
Voltage
2.72
2.125
1.49
0.86
Figure 2-8 • LVPECL High and Low Threshold Values
Table 2-5 • LVPECL Receiver Specifications
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
VID
Differential Input Voltage
Minimum
1.49
0.86
0.3
Maximum
2.72
2.125
VDD
Units
V
V
V
v5.9
2-7
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