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ADV7343 View Datasheet(PDF) - Analog Devices

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Description
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ADV7343 Datasheet PDF : 88 Pages
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ADV7342/ADV7343
MPU PORT TIMING SPECIFICATIONS
VDD = 1.71 V to 1.89 V. PVDD = 1.71 V to 1.89 V. VAA = 2.6 V to 3.465 V. VDD_IO = 2.97 V to 3.63 V.
All specifications TMIN to TMAX (−40°C to +85°C), unless otherwise noted.
Table 8.
Parameter
MPU PORT, I2C MODE1
SCL Frequency
SCL High Pulse Width, t1
SCL Low Pulse Width, t2
Hold Time (Start Condition), t3
Setup Time (Start Condition), t4
Data Setup Time, t5
SDA, SCL Rise Time, t6
SDA, SCL Fall Time, t7
Setup Time (Stop Condition), t8
MPU PORT, SPI MODE1
SCLK Frequency
SPI_SS to SCLK Setup Time, t1
SCLK High Pulse Width, t2
SCLK Low Pulse Width, t3
Data Access Time after SCLK Falling Edge, t4
Data Setup Time prior to SCLK Rising Edge, t5
Data Hold Time after SCLK Rising Edge, t6
SPI_SS to SCLK Hold Time, t7
SPI_SS to MISO High Impedance, t8
Conditions
See Figure 19
See Figure 20
Min Typ Max Unit
0
400 kHz
0.6
μs
1.3
μs
0.6
μs
0.6
μs
100
ns
300 ns
300 ns
0.6
μs
0
10
MHz
20
ns
50
ns
50
ns
35
ns
20
ns
0
ns
0
ns
40
ns
1 Guaranteed by characterization.
POWER SPECIFICATIONS
VDD = 1.8 V, PVDD = 1.8 V, VAA = 3.3 V, VDD_IO = 3.3 V, TA = +25°C.
Table 9.
Parameter
NORMAL POWER MODE1, 2
IDD 3
IDD_IO
IAA
IPLL
SLEEP MODE
IDD
IAA
IDD_IO
IPLL
Conditions
SD only (16× oversampling)
ED only (8× oversampling)4
HD only (4× oversampling)4
SD (16× oversampling) and ED (8× oversampling)
SD (16× oversampling) and HD (4× oversampling)
3 DACs enabled (ED/HD only)
6 DACs enabled (SD only and simultaneous modes )
SD only, ED only or HD only modes
Simultaneous modes
Min Typ
90
65
91
95
122
1
124
140
5
10
5
0.3
0.2
0.1
1 RSET1 = 510 Ω (DAC 1, DAC 2, and DAC 3 operating in full-drive mode). RSET2 = 4.12 kΩ (DAC 4, DAC 5, and DAC 6 operating in low drive mode).
2 75% color bar test pattern applied to pixel data pins.
3 IDD is the continuous current required to drive the digital core.
4 Applicable to both single data rate (SDR) and dual data rate (DDR) input modes.
Rev. 0 | Page 8 of 88
Max
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
μA
μA
μA
 

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