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ADV7320KSTZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADV7320KSTZ Datasheet PDF : 88 Pages
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ADV7320/ADV7321
CLKIN_B*
t9
t10
Y9–Y0
3FF
00
00
XY
Cb0
Y0
Cr0
Y1
t12
t11
CONTROL
OUTPUTS
t12
t11
t13
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
t14
*CLKIN_B USED IN THIS PS ONLY MODE.
Figure 8. PS Only 4:2:2 10-Bit Interleaved at 27 MHz EAV/SAV Input Mode (Input Mode 100)
CLKIN_A
t9 t10
Y9–Y0
3FF
00
00
XY
Cb0
Y0
Cr0
Y1
t12
t13
t11
t14
CONTROL
OUTPUTS
t9 = CLOCK HIGH TIME
t10 = CLOCK LOW TIME
t11 = DATA SETUP TIME
t12 = DATA HOLD TIME
NOTE: Y0, Cb0 SEQUENCE AS PER SUBADDRESS 0x01 BIT-1
Figure 9. PS Only 4:2:2 10-Bit Interleaved at 54 MHz EAV/SAV Input Mode (Input Mode 111)
CLKIN_B
CONTROL
INPUTS
P_HSYNC,
P_VSYNC,
P_BLANK
Y9–Y0
C9–C0
t9 t10
t12
Y0
Y1
Y2
Y3
Y4
Y5
Cb0
Cr0
Cb2
Cr2
Cb4
Cr4
t11
HD INPUT
CLKIN_A
t9
t10
t12
CONTROL
S_HSYNC,
INPUTS
S_VSYNC,
S_BLANK
SD INPUT
S9–S0
Cb0
Y0
Cr0
Y1
Cb1
Y2
t11
Figure 10. HD 4:2:2 and SD (10-Bit) Simultaneous Input Mode (Input Mode 101: SD Oversampled) (Input Mode 110: HD Oversampled)
Rev. 0 | Page 11 of 88
 

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