ADV7181BST View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADV7181BST Datasheet PDF : 104 Pages
| |||
ADV7181
Table 8. Manual Mux Settings for All ADCs
SETADC_sw_man_en = 1
ADC0_sw[3:0] ADC0 connected to: ADC1_sw[3:0] ADC1 connected to:
0000
No Connection
0000
No Connection
0001
AIN2
0001
No Connection
0010
No Connection
0010
No Connection
0011
No Connection
0011
No Connection
0100
AIN4
0100
AIN4
0101
AIN6
0101
AIN6
0110
No Connection
0110
No Connection
0111
No Connection
0111
No Connection
1000
No Connection
1000
No Connection
1001
AIN1
1001
No Connection
1010
No Connection
1010
No Connection
1011
No Connection
1011
No Connection
1100
AIN3
1100
AIN3
1101
AIN5
1101
AIN5
1110
No Connection
1110
No Connection
1111
No Connection
1111
No Connection
ADC2_sw[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
ADC2 connected to:
No Connection
No Connection
No Connection
No Connection
No Connection
AIN6
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
No Connection
AIN5
No Connection
No Connection
CONNECTING
ANALOG SIGNALS
TO ADV7181
SET INSEL[3:0] TO
CONFIGURE ADV7181 TO
DECODE VIDEO FORMAT:
CVBS: 0000
YC: 0110
YPrPb: 1001
CONFIGURE ADC INPUTS USING
MUXING CONTROL BITS
(ADC_sw_man_en,
ADC0_sw,adc1_sw, ADC2_sw)
Figure 6. Input Muxing Overview
INSEL[3:0] Input Selection, Address 0x00, [3:0]
The INSEL bits allow the user to select the input format. It
configures the Standard Definition Processor core to process
CVBS (Comp), S-Video (Y/C) or Component (YPbPr) format.
Table 9. Standard Definition Processor Format Selection,
INSEL[3:0]
INSEL[3:0]
Video Format (SDP)
0000
Composite
0110
YC
1001
YPrPb
Rev. A | Page 14 of 104
|
|
Share Link: 