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ADV7150 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADV7150 Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADV7150
TIMING CHARACTERISTICS1 (VAA2 = +5 V; VREF = +1.235 V; RSET = 280 . IOR, IOG, IOB (RL = 37.5 , CL = 10 pF);
IOR, IOG, I0B = GND. All specifications TMIN to TMAX3 unless otherwise noted.)
CLOCK CONTROL AND PIXEL PORT4
Parameter
220 MHz 170 MHz 135 MHz 110 MHz 85 MHz
Version Version Version Version Version Units
Conditions/Comments
fCLOCK
t1
t2
t3
t4
fLOADIN
1:1 Multiplexing
2:1 Multiplexing
4:1 Multiplexing
t5
1:1 Multiplexing
2:1 Multiplexing
4:1 Multiplexing
t6
1:1 Multiplexing
2:1 Multiplexing
4:1 Multiplexing
t7
1:1 Multiplexing
2:1 Multiplexing
4:1 Multiplexing
t8
t9
t10
τ–t115
tPD6
1:1 Multiplexing
2:1 Multiplexing
4:1 Multiplexing
t12
t13
t14
t15
220
4.55
2
2
10
110
110
55
9.1
9.1
18.18
4
4
8
4
4
8
0
5
0
τ–5
5
6
8
10
5
5
1
170
5.88
2.5
2.5
10
110
85
42.5
9.1
11.76
23.53
4
5
9
4
5
9
0
5
0
τ–5
5
6
8
10
5
5
1
135
7.4
3.2
3
10
110
67.5
33.75
9.1
14.8
29.63
4
6
12
4
6
12
0
5
0
τ–5
5
6
8
10
5
5
1
110
9.1
4
4
10
110
55
27.5
9.1
18.18
36.36
4
8
15
4
8
15
0
5
0
τ–5
5
6
8
10
5
5
1
85
11.77
4
4
10
85
42.5
21.25
9.1
23.53
47.1
4
9
18
4
9
18
0
5
0
τ–5
5
6
8
10
5
5
1
MHz max
ns min
ns min
ns min
ns max
MHz max
MHz max
MHz max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
CLOCKs
CLOCKs
CLOCKs
ns max
ns max
ns min
ns min
Pixel CLOCK Rate
Pixel CLOCK Cycle Time
Pixel CLOCK High Time
Pixel CLOCK Low Time
Pixel CLOCK to LOADOUT Delay
LOADIN Clocking Rate
LOADIN Cycle Time
LOADIN High Time
LOADIN Low Time
Pixel Data Setup Time
Pixel Data Hold Time
LOADOUT to LOADIN Delay
LOADOUT to LOADIN Delay
Pipeline Delay
(1 × CLOCK = t1)
Pixel CLOCK to PRGCKOUT Delay
SCKIN to SCKOUT Delay
BLANK to SCKIN Setup Time
BLANK to SCKIN Hold Time
ANALOG OUTPUTS7
Parameter
220 MHz 170 MHz 135 MHz 110 MHz 85 MHz
Version Version Version Version Version Units
Conditions/Comments
t16
15
15
15
15
15
ns typ Analog Output Delay
t17
1
1
1
1
1
ns typ Analog Output Rise/Fall Time
t18
15
15
15
15
15
ns typ Analog Output Transition Time
tSK
2
2
2
2
2
ns max Analog Output Skew (IOR, IOG, IOB)
0
0
0
0
0
ns typ
MPU PORTS8, 9
Parameter
220 MHz 170 MHz 135 MHz 110 MHz 85 MHz
Version Version Version Version Version Units
Conditions/Comments
t19
3
3
3
3
3
ns min R/W, C0, C1 to CE Setup Time
t20
10
10
10
10
10
ns min R/W, C0, C1 to CE Hold Time
t21
45
45
45
45
45
ns min CE Low Time
t22
25
25
25
25
25
ns min CE High Time
t238
5
5
5
5
5
ns min CE Asserted to Databus Driven
t249
45
45
45
45
45
ns max CE Asserted to Data Valid
t259
20
20
20
20
20
ns max CE Disabled to Databus Three-Stated
5
5
5
5
5
ns min
t26
20
20
20
20
20
ns min Write Data (D0–D9) Setup Time
t27
5
5
5
5
5
ns min Write Data (D0–D9) Hold Time
REV. A
–3–
 

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