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ADS8504IBDWRG4 View Datasheet(PDF) - Burr-Brown -> Texas Instruments

Part NameDescriptionManufacturer
ADS8504IBDWRG4 12-BIT 250-KSPS SAMPLING CMOS ANALOG-TO-DIGITAL CONVERTER BB
Burr-Brown -> Texas Instruments BB
ADS8504IBDWRG4 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADS8504
www.ti.com
SLAS434 – JUNE 2005
DEVICE INFORMATION (continued)
Terminal Functions
TERMINAL
NAME
DW NO.
AGND1
2
AGND2
5
BUSY
26
BYTE
23
CAP
4
CS
25
DGND
14
D11 (MSB)
6
D10
7
D9
8
D8
9
D7
10
D6
11
D5
12
D4
13
D3
15
D2
16
D1
17
D0 (LSB)
18
DZ
19
DZ
20
DZ
21
DZ
22
R/C
24
REF
3
VANA
27
VDIG
28
VIN
1
DIGITAL
I/O
DESCRIPTION
Analog ground. Used internally as ground reference point.
Analog ground.
O
At the start of a conversion, BUSY goes low and stays low until the conversion is
completed and the digital outputs have been updated.
I
Selects 8 most significant bits (low) or 8 least significant bits (high).
Reference buffer capacitor. 2.2-µF tantalum capacitor to ground.
I
Internally ORed with R/C. If R/C low, a falling edge on CS initiates a new conversion.
Digital ground.
O
Data bit 11. Most significant bit (MSB) of conversion results. Hi-Z state when CS is
high, or when R/C is low.
O
Data bit 10. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 9. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 8. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 7. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 6. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 5. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 4. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 3. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 2. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 1. Hi-Z state when CS is high, or when R/C is low.
O
Data bit 0. Least significant bit (LSB) of conversion results. Hi-Z state when CS is high,
or when R/C is low.
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
O
Low when CS low, R/C high. Hi-Z state when CS is high, or when R/C is low.
I
With CS low and BUSY high, a falling edge on R/C initiates a new conversion. With CS
low, a rising edge on R/C enables the parallel output.
Reference input/output. 2.2-µF tantalum capacitor to ground.
Analog supply input. Nominally +5 V. Decouple to ground with 0.1-µF ceramic and
10-µF tantalum capacitors.
Digital supply input. Nominally +5 V. Connect directly to pin 27. Must be VANA.
Analog input.
5
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