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ADS8515 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
ADS8515 16-Bit 250-kSPS Sampling CMOS ANALOG-TO-DIGITAL CONVERTER TI
Texas Instruments TI
ADS8515 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADS8515
www.ti.com
PIN
NAME
NO.
AGND1
2
AGND2
5
BUSY
26
BYTE
23
CAP
4
CS
25
DGND
14
D15 (MSB)
6
D14
7
D13
8
D12
9
D11
10
D10
11
D9
12
D8
13
D7
15
D6
16
D5
17
D4
18
D3
19
D2
20
D1
21
D0 (LSB)
22
R/C
24
REF
3
VANA
27
VDIG
28
VIN
1
DIGITAL
I/O
O
I
I
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
PIN DESCRIPTIONS
SLAS460D – JUNE 2007 – REVISED SEPTEMBER 2010
DESCRIPTION
Analog ground. Used internally as ground reference point.
Analog ground.
At the start of a conversion, BUSY goes low and stays low until the conversion is
completed and the digital outputs have been updated.
Selects 8 most significant bits (low) or 8 least significant bits (high).
Reference buffer capacitor. 2.2-mF tantalum capacitor to ground.
Internally ORed with R/C. If R/C low, a falling edge on CS initiates a new conversion.
Digital ground.
Data bit 15. Most significant bit (MSB) of conversion results. Hi-Z state when CS is high, or
when R/C is low.
Data bit 14. Hi-Z state when CS is high, or when R/C is low.
Data bit 13. Hi-Z state when CS is high, or when R/C is low.
Data bit 12. Hi-Z state when CS is high, or when R/C is low.
Data bit 11. Hi-Z state when CS is high, or when R/C is low.
Data bit 10. Hi-Z state when CS is high, or when R/C is low.
Data bit 9. Hi-Z state when CS is high, or when R/C is low.
Data bit 8. Hi-Z state when CS is high, or when R/C is low.
Data bit 7. Hi-Z state when CS is high, or when R/C is low.
Data bit 6. Hi-Z state when CS is high, or when R/C is low.
Data bit 5. Hi-Z state when CS is high, or when R/C is low.
Data bit 4. Hi-Z state when CS is high, or when R/C is low.
Data bit 3. Hi-Z state when CS is high, or when R/C is low.
Data bit 2. Hi-Z state when CS is high, or when R/C is low.
Data bit 1. Hi-Z state when CS is high, or when R/C is low.
Data bit 0. Least significant bit (LSB) of conversion results. Hi-Z state when CS is high, or
when R/C is low.
With CS low and BUSY high, a falling edge on R/C initiates a new conversion. With CS
low, a rising edge on R/C enables the parallel output.
Reference input/output. 2.2-mF tantalum capacitor to ground.
Analog supply input. Nominally +5 V. Decouple to ground with 0.1-mF ceramic and 10-mF
tantalum capacitors.
Digital supply input. Can be connected directly to pin 27.
Analog input. See Figure 24.
Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): ADS8515
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