Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

ADS7866 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
ADS7866 1.2-V, 12-/10-/8-BIT, 200-KSPS/100-KSPS, MICRO-POWER, MINIATURE ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE TI
Texas Instruments TI
ADS7866 Datasheet PDF : 28 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
ADS7866
ADS7867
ADS7868
SLAS465 – JUNE 2005
www.ti.com
THEORY OF OPERATION (continued)
Table 1. Acquisition, Conversion, SCLK, and Potential Throughput Calculation
MIN tSU(CSF-FSCLKF)
MAX tDIS(EOC-SDOZ)
MIN tSU(LSBZ-CSF)
MAX fSCLK
MIN tsample
MIN tconvert
MIN tCYCLE
fsample
PARAMETER
Setup time
Disable time
Setup time
Frequency
Sample time
Conversion time
Cycle time
Theoretical sample fre-
quency
SUPPLY VOLTAGE
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
1.2 V VDD < 1.6 V
1.6 V VDD < 1.8 V
1.8 V VDD 3.6 V
ADS7866
192
55
55
80
60
60
20
10
10
1.7
3.4
3.4
1368
643
643
7647
3824
3824
9116
4537
4537
110
220
220
ADS7867
192
55
55
80
60
60
20
10
10
1.7
3.4
3.4
1368
643
643
6471
3235
3235
7939
3949
3949
126
253
253
ADS7868
192
55
55
80
60
60
20
10
10
1.7
3.4
3.4
1368
643
643
5294
2647
2647
6763
3360
3360
148
298
298
UNIT
ns
ns
ns
MHz
ns
ns
ns
KSPS
TYPICAL CONNECTION
For a typical connection circuit for the ADS7866/67/68 see Figure 27. A REF3112 is used to supply 1.2 V to the
device. A 0.1-µF decoupling capacitor is required between the REF/VDD and GND pins of the converter. This
capacitor should be placed as close as possible to the pins of the device. Designers should strive to minimize the
routing length of the traces that connect the terminals of the capacitor to the pins of the converter.
Keep in mind the converter offers no inherent rejection of noise or voltage variation in regards to the reference
input. This is of particular concern because the reference input is tied to the power supply. Any noise and ripple
from the supply appears directly in the digital results. While high frequency noise can be filtered out as described
in the previous paragraph, voltage variation due to the line frequency (50 Hz or 60 Hz) can be difficult to remove.
1.8 V
REF3112
Host
Processor
SS
SCK
MISO
1.2 V
0.1 mF
GND
REF/VDD
GND
CS
SCLK
SDO
ADS7866/67/68
VIN
Analog Input
Figure 27. Typical Circuit Configuration
18
Direct download click here

 

Share Link : 
All Rights Reserved© datasheetq.com 2015 - 2019  ] [ Privacy Policy ] [ Request Datasheet  ] [ Contact Us ]