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ADF4350BCPZ-RL7 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADF4350BCPZ-RL7
ADI
Analog Devices ADI
ADF4350BCPZ-RL7 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADF4350
Pin No.
22
23
24
25
26
27
28
29
30
31
32
33
Mnemonic
RSET
VCOM
VREF
LD
PDBRF
DGND
DVDD
REFIN
MUXOUT
SDGND
SDVDD
EP
Description
Connecting a resistor between this pin and GND sets the charge pump output current. The nominal voltage
bias at the RSET pin is 0.55 V. The relationship between ICP and RSET is
ICP
= 25.5
R SET
where:
RSET = 5.1 kΩ
ICP = 5 mA
Internal Compensation Node Biased at Half the Tuning Range. Decoupling capacitors to the ground plane
should be placed as close as possible to this pin.
Reference Voltage. Decoupling capacitors to the ground plane should be placed as close as possible to this pin.
Lock Detect Output Pin. This pin outputs a logic high to indicate PLL lock. A logic low output indicates loss of PLL lock.
RF Power-Down. A logic low on this pin mutes the RF outputs. This function is also software controllable.
Digital Ground. Ground return path for DVDD.
Digital Power Supply. This pin should be the same voltage as AVDD. Decoupling capacitors to the ground plane
should be placed as close as possible to this pin.
Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and a dc equivalent input resistance of
100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.
Multiplexer Output. This multiplexer output allows either the lock detect, the scaled RF, or the scaled reference
frequency to be accessed externally.
Digital Sigma-Delta (Σ-Δ) Modulator Ground. Ground return path for the Σ-Δ modulator.
Power Supply Pin for the Digital Σ-Δ Modulator. Should be the same voltage as AVDD. Decoupling capacitors to
the ground plane are to be placed as close as possible to this pin.
Exposed Pad.
Rev. 0 | Page 8 of 28
 

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