ADF4151BCPZ View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADF4151BCPZ

Fractional-N/Integer-N PLL Synthesizer

Analog Devices 

ADF4151

Data Sheet

Pin No.

22

25

26, 27

28

29

30

31

32

Mnemonic

RSET

LD

DGND

DVDD

REFIN

MUXOUT

SDGND

SDVDD

EP

Description

Connecting a resistor between this pin and GND sets the charge pump output current. The nominal voltage

bias at the RSET pin is 0.49 V. The relationship between ICP and RSET is

I CP

=

22.95

RSET

where:

RSET = 5.1 kΩ.

ICP = 4.5 mA.

Lock Detect Output Pin. This pin outputs a logic high to indicate PLL lock; a logic low output indicates loss of PLL

lock.

Digital Ground. Ground return path for DVDD.

Digital Power Supply. This pin should be the same voltage as AVDD. Decoupling capacitors to the ground plane

should be placed as close as possible to this pin.

Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and a dc equivalent input resistance

of 100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator, or it can be ac-coupled.

Multiplexer Output. This multiplexer output allows either the lock detect, the scaled RF, or the scaled reference

frequency to be accessed externally.

Digital Sigma-Delta (Σ-Δ) Modulator Ground. Ground return path for the Σ-Δ modulator.

Power Supply Pin for the Digital Σ-Δ Modulator. Should be the same voltage as AVDDx. Decoupling capacitors

to the ground plane are to be placed as close as possible to this pin.

The exposed pad must be connected to GND.

Rev. B | Page 8 of 28

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