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ADF4151 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADF4151 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADF4151
Data Sheet
Parameter
NOISE CHARACTERISTICS
Normalized In-Band Phase Noise
Floor (PNSYNTH)3
Normalized 1/f Noise (PN1_f)4
Normalized In-Band Phase Noise
Floor (PNSYNTH)3
Normalized 1/f Noise (PN1_f)4
Spurious Signals Due to PFD
Frequency5
B Version
Min
Typ Max Unit
−221
−118
−220
−115
−107
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc
Conditions/Comments
PLL loop BW = 500 kHz (ABP = 3 ns)
10 kHz offset. Normalized to 1 GHz (ABP = 3 ns)
PLL loop BW = 500 kHz (ABP = 6 ns);
low noise mode
10 kHz offset; normalized to 1 GHz (ABP = 6 ns);
low noise mode
PFD = 25 MHz
1 AC coupling ensures AVDD/2 bias.
2 TA = 25°C; AVDD = DVDD = 3.6 V; prescaler = 4/5; fREFIN = 130 MHz; fPFD = 26 MHz; fRF = 1.742 GHz.
3 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log FPFD. PNSYNTH = PNTOT – 10 log fPFD – 20 log N
4 The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (fRF)
and at a frequency offset (f) is given by PN = P1_f + 10 log(10 kHz/f) + 20 log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL
5 Spurious measured on EVAL-ADF4151EB1Z with RF buffer between VCO output and RF input by-passed, using a Rohde & Schwarz FSUP signal source analyzer.
Rev. B | Page 4 of 28
 

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