DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

ADC80-12 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADC80-12 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD ADC80
GROUNDING
Many data-acquisition components have two or more ground
pins that are not connected together within the device. These
grounds are usually referred to as the logic power return, analog
common (analog power return), and analog signal ground. These
grounds must be tied together at one point, usually at the system
power-supply ground. Ideally, a single solid ground is desirable.
However, since current flows through the ground wires and etch
stripes of the circuit cards, and since these paths have resistance
and inductance, hundreds of millivolts can be generated between
the system ground point and the ground pin of the AD ADC80.
Therefore, separate ground returns should be provided to
minimize the current flow in the path from sensitive points to
the system ground point, and the two device grounds should be
tied together. In this way, supply currents and logic-gate return
currents are not summed into the same return path as analog
signals where they would cause measurement errors.
Each of the AD ADC80s supply terminals should be capacitively
decoupled as close to the AD ADC80 as possible. A large value
capacitor such as 1 µF in parallel with a 0.1 µF capacitor is
usually sufficient. Analog supplies are bypassed to the analog
power return pin and the logic supply is bypassed to the logic
power return pin.
ANALOG
PS
+15V C –15V
DIGITAL
PS
C
5V
0.01 0.01
F F
0.01 0.01
F F
0.01 0.01
F F
DIG
0.01
F
COM
AD521
INST. AMP
*ANALOG
AD583
SAMPLE AND
HOLD
17 15 25 10 9 7
AD ADC80
GROUND
SIGNAL
OUTPUT
GROUND
REFERENCE
* IF INDEPENDENT, OTHERWISE RETURN
AMPLIFIER REFERENCE TO MECCA AT
ANALOG PS COMMON
Figure 9. Basic Grounding Practice
CONTROL MODES
The timing sequence of the AD ADC80 allows the device to be
easily operated in a variety of systems with different control
modes. The most common control modes are illustrated in
Figures 10 through 12.
CONVERT
COMMAND
AD ADC80
18 CONVERT
28
BIT 11
COMMAND
SHORT 21
CYCLE
CLOCK 20
INHIBIT
EXTERNAL 19
CLOCK
10-BIT
OPERATION
12-BIT
OPERATION
5V
Figure 10. Internal Clock—Normal Operating
Mode. Conversion Initiated by the Rising Edge of
the Convert Command. The Internal Clock Runs
Only During Conversion.
EXTERNAL
CLOCK
DIGITAL
COMMON
19
EXTERNAL
CLOCK
28
BIT 11
AD ADC80
SHORT 21
CYCLE
18 CONVERT CLOCK 20
COMMAND INHIBIT
10-BIT
OPERATION
12-BIT
OPERATION
5V
DIGITAL
COMMON
Figure 11. Continuation Conversion with External
Clock. Conversion Is Initiated by 14th Clock Pulse.
Clock Runs Continuously.
EXTERNAL
CLOCK
19
EXTERNAL
CLOCK
28
BIT 11
AD ADC80
22
STATUS
SHORT 21
CYCLE
10-BIT
OPERATION
12-BIT
OPERATION
5V
CONVERT
COMMAND
18 CONVERT CLOCK 20 DIGITAL
COMMAND INHIBIT
COMMON
Figure 12. Continuous External Clock. Conversion
Initiated by Rising Edge of Convert Command.
The Convert Command Must Be Synchronized
with Clock.
–10–
REV. D
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]