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ADC0844 Просмотр технического описания (PDF) - National ->Texas Instruments

Номер в каталогеADC0844 National-Semiconductor
National ->Texas Instruments National-Semiconductor
Компоненты Описание8-Bit μP Compatible A/D Converters with Multiplexer Options
ADC0844 Datasheet PDF : 24 Pages
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3.0 THE ANALOG INPUTS
3.1 Analog Differential Voltage Inputs and Common-
Mode Rejection
The differential input of these converters actually reduces the
effects of common-mode input noise, a signal common to
both selected “+” and “−” inputs for a conversion (60 Hz is
most typical). The time interval between sampling the “+” input
and then the “−” inputs is ½ of a clock period. The change in
the common-mode voltage during this short time interval can
cause conversion errors. For a sinusoidal common-mode sig-
nal this error is:
501638
where fCM is the frequency of the common-mode signal,
Vpeak is its peak voltage value and tC is the conversion time.
For a 60 Hz common-mode signal to generate a ¼ LSB error
(5 mV) with the converter running at 40 μS, its peak value
would have to be 5.43V. This large a common-mode signal is
much greater than that generally found in a well designed data
acquisition system.
TABLE 2. ADC0848 MUX Addressing
MUX Address
Channel
CS WR RD
MUX Mode
MA4 MA3 MA2 MA1 MA0
CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 AGND
X L L L LL
H+
X L L L HL
H+
X L L H LL
H
+
X L L H H L NP H
X L H L LL
H
+
+
Differential
X L H L HL
H
+
X L HH LL
H
+
X L H H HL
H
+
L H L L LL
H+
L H L L HL
H
+
L H L H LL
H
+
L H L H H L NP H
L HH L LL
H
+
+
Single-Ended
L H H L HL
H
+
L HHH LL
H
+
L H H H HL
H
+
HH L L LL
H+
H H L L HL
H
+
HH L H LL
H
H H L H H L NP H
HHH L LL
H
+
+
+
Pseudo-
Differential
H H H L HL
H
+
HHHH LL
H
+
X X X X XL
L
Previous Channel Configuration
X = don't care, NP = negative pulse
3.2 Input Current
Due to the sampling nature of the analog inputs, short dura-
tion spikes of current enter the “+” input and exit the “−” input
at the clock edges during the actual conversion. These cur-
rents decay rapidly and do not cause errors as the internal
comparator is strobed at the end of a clock period. Bypass
capacitors at the inputs will average these currents and cause
an effective DC current to flow through the output resistance
of the analog signal source. Bypass capacitors should not be
used if the source resistance is greater than 1 kΩ.
3.3 Input Source Resistance
The limitation of the input source resistance due to the DC
leakage currents of the input multiplexer is important. A worst-
case leakage current of ± 1 μA over temperature will create a
1 mV input error with a 1 kΩ source resistance. An op amp
RC active low pass filter can provide both impedance buffer-
ing and noise filtering should a high impedance signal source
be required.
4.0 OPTIONAL ADJUSTMENTS
4.1 Zero Error
The zero of the A/D does not require adjustment. If the mini-
mum analog input voltage value, VIN(MIN), is not ground, a zero
offset can be done. The converter can be made to output 0000
0000 digital code for this minimum input voltage by biasing
any VIN (−) input at this VIN(MIN) value. This is useful for either
differential or pseudo-differential modes of input channel con-
figuration.
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
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