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ADC0844 Просмотр технического описания (PDF) - National ->Texas Instruments

Номер в каталогеADC0844 National-Semiconductor
National ->Texas Instruments National-Semiconductor
Компоненты Описание8-Bit μP Compatible A/D Converters with Multiplexer Options
ADC0844 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Functional Description
The ADC0844 and ADC0848 contain a 4-channel and 8-
channel analog input multiplexer (MUX) respectively. Each
MUX can be configured into one of three modes of operation
differential, pseudo-differential, and single ended. These
modes are discussed in the Applications Information Section.
The specific mode is selected by loading the MUX address
latch with the proper address (see Table 1 and Table 2). In-
puts to the MUX address latch (MA0-MA4) are common with
data bus lines (DB0-DB4) and are enabled when the RD line
is high. A conversion is initiated via the CS and WR lines. If
the data from a previous conversion is not read, the INTR line
will be low. The falling edge of WR will reset the INTR line
high and ready the A/D for a conversion cycle. The rising edge
of WR, with RD high, strobes the data on the MA0/DB0-MA4/
DB4 inputs into the MUX address latch to select a new input
configuration and start a conversion. If the RD line is held low
during the entire low period of WR the previous MUX config-
uration is retained, and the data of the previous conversion is
the output on lines DB0-DB7. After the conversion cycle (tC
40 μs), which is set by the internal clock frequency, the dig-
ital data is transferred to the output latch and the INTR is
asserted low. Taking CS and RD low resets INTR output high
and outputs the conversion result on the data lines (DB0-
DB7).
Applications Information
1.0 MULTIPLEXER CONFIGURATION
The design of these converters utilizes a sampled-data com-
parator structure which allows a differential analog input to be
converted by a successive approximation routine.
The actual voltage converted is always the difference be-
tween an assigned “+” input terminal and a “−” input terminal.
The polarity of each input terminal of the pair being converted
indicates which line the converter expects to be the most pos-
itive. If the assigned “+” input is less than the “−” input the
converter responds with an all zeros output code.
A unique input multiplexing scheme has been utilized to pro-
vide multiple analog channels. The input channels can be
software configured into three modes: differential, single end-
ed, or pseudo-differential. Figure 1 shows the three modes
using the 4-channel MUX ADC0844. The eight inputs of the
ADC0848 can also be configured in any of the three modes.
In the differential mode, the ADC0844 channel inputs are
grouped in pairs, CH1 with CH2 and CH3 with CH4. The po-
larity assignment of each channel in the pair is interchange-
able. The single-ended mode has CH1–CH4 assigned as the
positive input with the negative input being the analog ground
(AGND) of the device. Finally, in the pseudo-differential mode
CH1–CH3 are positive inputs referenced to CH4 which is now
a pseudo-ground. This pseudo-ground input can be set to any
potential within the input common-mode range of the con-
verter. The analog signal conditioning required in transducer-
based data acquisition systems is significantly simplified with
this type of input flexibility. One converter package can now
handle ground referenced inputs and true differential inputs
as well as signals with some arbitrary reference voltage.
The analog input voltages for each channel can range from
50 mV below ground to 50 mV above VCC (typically 5V) with-
out degrading conversion accuracy.
TABLE 1. ADC0844 MUX ADDRESSING
MUX Address
Channel#
CS WR RD
MA3 MA2 MA1 MA0
CH1 CH2 CH3 CH4 AGND
MUX Mode
X
L
L
L
L
H
+
X
L
L
H
L
NP
H
+
X
L
H
L
L
H
+
Differential
X
L
H
H
L
H
+
L
H
L
L
L
H
+
L
H
L
H
L
NP
H
L
H
H
L
L
H
+
+
Single-Ended
L
H
H
H
L
H
+
H
H
L
L
L
H
+
H
H
L
H
L
NP
H
+
H
H
H
L
L
H
+
Pseudo-
Differential
X
X
X
X
L
NP
L
Previous Channel Configuration
X = don't care, NP = negative pulse
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