Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits
Номер в каталоге  

ADC0831 Просмотр технического описания (PDF) - National ->Texas Instruments

Номер в каталогеADC0831 National-Semiconductor
National ->Texas Instruments National-Semiconductor
Компоненты Описание8-Bit Serial I/O A/D Converters with Multiplexer Options
ADC0831 Datasheet PDF : 33 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
Functional Description (Continued)
resistance of the analog signal source. Bypass capacitors
should not be used if the source resistance is greater than 1
This source resistance limitation is important with regard to
the DC leakage currents of input multiplexer as well. The
worst-case leakage current of ±1 µA over temperature will
create a 1 mV input error with a 1 ksource resistance. An
op amp RC active low pass filter can provide both imped-
ance buffering and noise filtering should a high impedance
signal source be required.
5.0 Optional Adjustments
5.1 Zero Error
The zero of the A/D does not require adjustment. If the
minimum analog input voltage value, VIN(MIN), is not ground
a zero offset can be done. The converter can be made to
output 0000 0000 digital code for this minimum input voltage
by biasing any VIN (−) input at this VIN(MIN) value. This
utilizes the differential mode operation of the A/D.
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
grounding the VIN(−) input and applying a small magnitude
positive voltage to the VIN(+) input. Zero error is the differ-
ence between the actual DC input voltage which is neces-
sary to just cause an output digital code transition from 0000
0000 to 0000 0001 and the ideal 12 LSB value (12 LSB=9.8
mV for VREF=5.000 VDC).
5.2 Full-Scale
The full-scale adjustment can be made by applying a differ-
ential input voltage which is 1 12 LSB down from the desired
analog full-scale voltage range and then adjusting the mag-
nitude of the VREF input (or VCC for the ADC0832) for a
digital output code which is just changing from 1111 1110 to
1111 1111.
5.3 Adjusting for an Arbitrary Analog Input Voltage
If the analog zero voltage of the A/D is shifted away from
ground (for example, to accommodate an analog input signal
which does not go to ground), this new zero reference
should be properly adjusted first. A VIN (+) voltage which
equals this desired zero reference plus 12 LSB (where the
LSB is calculated for the desired analog span, using 1 LSB=
analog span/256) is applied to selected “+” input and the
zero reference voltage at the corresponding “−” input should
then be adjusted to just obtain the 00HEX to 01HEX code
The full-scale adjustment should be made [with the proper
VIN(−) voltage applied] by forcing a voltage to the VIN(+)
input which is given by:
VMAX = the high end of the analog input range
VMIN = the low end (the offset zero) of the analog
(Both are ground referenced.)
The VREF (or VCC) voltage is then adjusted to provide a code
change from FEHEX to FFHEX. This completes the adjust-
ment procedure.
6.0 Power Supply
A unique feature of the ADC0838 and ADC0834 is the inclu-
sion of a zener diode connected from the V+ terminal to
ground which also connects to the VCC terminal (which is the
actual converter supply) through a silicon diode, as shown in
Figure 3. (Note 3)
FIGURE 3. An On-Chip Shunt Regulator Diode
This zener is intended for use as a shunt voltage regulator to
eliminate the need for any additional regulating components.
This is most desirable if the converter is to be remotely
located from the system power source.Figure 4 and Figure 5
illustrate two useful applications of this on-board zener when
an external transistor can be afforded.
An important use of the interconnecting diode between V+
and VCC is shown in Figure 6 and Figure 7. Here, this diode
is used as a rectifier to allow the VCC supply for the converter
to be derived from the clock. The low current requirements of
the A/D and the relatively high clock frequencies used (typi-
cally in the range of 10k–400 kHz) allows using the small
value filter capacitor shown to keep the ripple on the VCC line
to well under 14 of an LSB. The shunt zener regulator can
also be used in this mode. This requires a clock voltage
swing which is in excess of VZ. A current limit for the zener is
needed, either built into the clock generator or a resistor can
be used from the CLK pin to the V+ pin.
Direct download click here


Share Link : 
All Rights Reserved© datasheetq.com 2015 - 2019  ] [ Privacy Policy ] [ Request Datasheet  ] [ Contact Us ]