The AD9952 incorporates an integrated 14-bit current output
DAC. Unlike most DACs, this output is referenced to AVDD,
Two complementary outputs provide a combined full-scale
output current (IOUT). Differential outputs reduce the amount of
common-mode noise that might be present at the DAC output,
offering the advantage of an increased signal-to-noise ratio. The
full-scale current is controlled by an external resistor (RSET)
connected between the DAC_RSET pin and the DAC ground
(AGND_DAC). The full-scale current is proportional to the
resistor value as follows:
RSET = 39.19 / IOUT
The maximum full-scale output current of the combined DAC
outputs is 15 mA, but limiting the output to 10 mA provides the
best spurious-free dynamic range (SFDR) performance. The DAC
output compliance range is AVDD + 0.5 V to AVDD – 0.5 V.
Voltages developed beyond this range will cause excessive DAC
distortion and could potentially damage the DAC output circuitry.
Proper attention should be paid to the load termination to keep the
output voltage within this compliance range.
Many applications require a square wave signal rather than a
sine wave. For example, in most clocking applications a high
slew rate helps to reduce phase noise and jitter. To support these
applications, the AD9952 includes an on-chip comparator. The
comparator has a bandwidth greater than 200 MHz and a
common-mode input range of 1.3 V to 1.8 V. By setting the
comparator power-down bit, CFR1<6>, the comparator can be
turned off to save on power consumption.
Serial IO Port
The AD9952 serial port is a flexible, synchronous serial communi-
cations port that allows easy interface to many industry-standard
microcontrollers and microprocessors. The serial I/O port is com-
patible with most synchronous transfer formats, including both the
Motorola 6905/11 SPI® and Intel® 8051 SSR protocols.
The interface allows read/write access to all registers that configure
the AD9952. MSB first or LSB first transfer formats are supported.
The AD9952’s serial interface port can be configured as a single pin
I/O (SDIO), which allows a 2-wire interface or two unidirectional
pins for in/out (SDIO/SDO), which in turn enables a 3-wire inter-
face. Two optional pins, IOSYNC and CS, enable greater flexibility
for system design in the AD9952.
Register Map and Descriptions
The register map is listed in Table 5.
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