AD9520-4 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9520-4 Datasheet PDF : 84 Pages
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AD9520-4
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VS 1
REFMON 2
LD 3
VCP 4
CP 5
STATUS 6
REF_SEL 7
SYNC 8
LF 9
BYPASS 10
VS 11
VS 12
CLK 13
CLK 14
CS 15
SCLK/SCL 16
PIN 1
INDICATOR
AD9520
TOP VIEW
(Not to Scale)
48 OUT3 (OUT3A)
47 OUT3 (OUT3B)
46 VS_DRV
45 OUT4 (OUT4A)
44 OUT4 (OUT4B)
43 OUT5 (OUT5A)
42 OUT5 (OUT5B)
41 VS
40 VS
39 OUT8 (OUT8B)
38 OUT8 (OUT8A)
37 OUT7 (OUT7B)
36 OUT7 (OUT7A)
35 VS_DRV
34 OUT6 (OUT6B)
33 OUT6 (OUT6A)
NOTES
1. EXPOSED DIE PAD MUST BE CONNECTED TO GND.
Figure 5. Pin Configuration
Table 21. Pin Function Descriptions
Pin No.
Input/ Pin
Output Type
Mnemonic
1, 11, 12, I
32, 40, 41,
49, 57, 60,
61
Power
VS
2
O
3.3 V CMOS REFMON
3
O
3.3 V CMOS LD
4
I
Power
VCP
5
O
Loop filter CP
6
O
3.3 V CMOS STATUS
7
I
3.3 V CMOS REF_SEL
8
I
3.3 V CMOS SYNC
9
I
Loop filter LF
10
O
Loop filter BYPASS
13
I
Differential CLK
clock input
14
I
Differential CLK
clock input
Description
3.3 V Power Pins.
Reference Monitor (Output). It has multiple selectable outputs.
Lock Detect (Output). It has multiple selectable outputs.
Power Supply for Charge Pump (CP); VS < VCP < 5.0 V.
Charge Pump (Output). It connects to external loop filter.
Programmable Status Output.
Reference Select. It selects REF1 (low) or REF2 (high). This pin has an internal
30 kΩ pull-down resistor.
Manual Synchronizations and Manual Holdover. This pin initiates a manual
synchronization and is used for manual holdover. Active low. This pin has an
internal 30 kΩ pull-up resistor.
Loop Filter (Input). It connects internally to the VCO control voltage node.
This pin is for bypassing the LDO to ground with a capacitor.
Along with CLK, this is the differential input for the clock distribution section.
Along with CLK, this is the differential input for the clock distribution section.
Rev. 0 | Page 18 of 84
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