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AD9648 View Datasheet(PDF) - Analog Devices

Part NameDescriptionManufacturer
AD9648 14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter ADI
Analog Devices ADI
AD9648 Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9648
Parameter1
Temp Min
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
fIN = 9.7 MHz
fIN = 30.5 MHz
fIN = 70 MHz
25°C
25°C
25°C
Full 86
fIN = 100 MHz
fIN = 200 MHz
25°C
25°C
WORST OTHER (HARMONIC OR SPUR)
fIN = 9.7 MHz
fIN = 30.5 MHz
fIN = 70 MHz
25°C
25°C
25°C
Full
fIN = 100 MHz
fIN = 200 MHz
25°C
25°C
TWO-TONE SFDR
fIN = 29 MHz (−7 dBFS ), 32 MHz (−7 dBFS ) 25°C
CROSSTALK2
Full
ANALOG INPUT BANDWIDTH
25°C
AD9648-105
Typ
Max
98
90
93
92
81
−98
−96
−96
−91
−92
−90
84
−95
650
AD9648-125
Min
Typ
Max
96
90
91
82
90
84
−97
−97
−97
−90
−92
−90
84
−95
650
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
2 Crosstalk is measured at 100 MHz with −1.0 dBFS on one channel and no input on the alternate channel.
Unit
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dB
MHz
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, and DCS enabled, unless
otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
LOGIC INPUT (CSB)1
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
AD9628-105/125
Temp Min
Typ
Max
Unit
CMOS/LVDS/LVPECL
Full
0.9
Full 0.3
3.6
Full AGND - 0.3
AVDD + 0.2
Full 0.9
1.4
Full −10
+10
Full −10
+10
Full
4
Full 8
10
12
V
V p-p
V
V
μA
μA
pF
Full 1.22
Full 0
Full −10
Full 40
Full
26
Full
2
DRVDD + 0.2 V
0.6
V
+10
μA
132
μA
pF
Rev. 0 | Page 6 of 44
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