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AD9218BST-65 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9218BST-65 Datasheet PDF : 29 Pages
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AD9218
SWITCHING SPECIFICATIONS
VDD = 3.0 V, VD = 3.0 V; external reference, unless otherwise noted.
Table 4.
Parameter
ENCODE INPUT PARAMETERS
Maximum Encode Rate
Minimum Encode Rate
Encode Pulse Width High (tEH)
Encode Pulse Width Low (tEL)
Aperture Delay (tA)
Aperture Uncertainty (Jitter)
DIGITAL OUTPUT PARAMETERS
Output Valid Time (tV)1
Output Propagation Delay (tPD)1
Output Rise Time (tR)
Output Fall Time (tF)
Out-of-Range Recovery Time
Transient Response Time
Recovery Time from Power-Down
Pipeline Delay
Temp
Full
Full
Full
Full
25°C
25°C
Full
Full
25°C
25°C
25°C
25°C
25°C
Full
Test
Level
VI
IV
IV
IV
V
V
VI
VI
V
V
V
V
V
IV
AD9218BST-40/-65
Min
Typ Max
40/65
7/6
7/6
2
3
20/20
2.5
4.5 7
1
1.2
5
5
10
5
AD9218BST-80/-105
Min
Typ Max
80/105
5/3.8
5/3.8
2
3
20/20
2.5
4.5 6
1.0
1.2
5
5
10
5
Unit
MSPS
MSPS
ns
ns
ns
ps rms
ns
ns
ns
ns
ns
ns
Cycles
Cycles
1 tV and tPD are measured from the 1.5 level of the ENCODE input to the 50%/50% levels of the digital outputs swing. The digital output load during test is not to exceed
an ac load of 5 pF or a dc current of ±40 μA. Rise and fall times are measured from 10% to 90%.
TIMING DIAGRAMS
SAMPLE N
SAMPLE
N+1
SAMPLE
N+5
SAMPLE
N+6
AINA
AINB
tA
tEH
ENCODE A
ENCODE B
SAMPLE
SAMPLE
N+2
N+3
tEL
1/fS
SAMPLE
N+4
D9A TO D0A
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
tPD
DATA N – 1
tV
DATA N
D9B TO D0B
DATA N – 5
DATA N – 4
DATA N – 3
DATA N – 2
DATA N – 1
Figure 2. Normal Operation, Same Clock (S1 = 1, S2 = 0) Channel Timing
DATA N
Rev. C | Page 6 of 28
 

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