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AD9218BST-RL80 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9218BST-RL80 Datasheet PDF : 29 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9218
GND 1
AINA 2
AINA 3
DFS/GAIN 4
REFINA 5
REFOUT 6
REFINB 7
S1 8
S2 9
AINB 10
AINB 11
GND 12
AD9218
TOP VIEW
(Not to Scale)
36 D1A
35 D0A
34 GND
33 VDD
32 GND
31 VD
30 VD
29 GND
28 VDD
27 GND
26 D0B
25 D1B
Figure 5. Pin Configuration
Table 7. Pin Function Descriptions
Pin Number
Mnemonic Description
1, 12, 16, 27, 29, GND
32, 34, 45
Ground.
2
AINA
Analog Input for Channel A.
3
AINA
Analog Input for Channel A (Complementary).
4
DFS/GAIN Data Format Select and Analog Input Gain Mode. Low = offset binary output available, 1 V p-p supported;
high = twos complement output available, 1 V p-p supported; floating = offset binary output available,
2 V p-p supported; set to VREF = twos complement output available, 2 V p-p supported.
5
REFINA
Reference Voltage Input for Channel A.
6
REFOUT
Internal Reference Voltage.
7
REFINB
Reference Voltage Input for Channel B.
8
S1
User Select No. 1. See Table 6.
9
S2
User Select No. 2. See Table 6.
10
11
13, 30, 31, 48
14
15, 28, 33, 46
17 to 26
35 to 44
47
A INB
AINB
VD
ENCB
V DD
D9B to D0B
D0A to D9A
ENCA
Analog Input for Channel B (Complementary).
Analog Input for Channel B.
Analog Supply (3 V).
Clock Input for Channel B.
Digital Supply (2.5 V to 3.6 V).
Digital Output for Channel B (D9B = MSB).
Digital Output for Channel A (D9A = MSB).
Clock Input for Channel A.
Rev. C | Page 9 of 28
 

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