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AD9148BBCZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9148BBCZ Datasheet PDF : 72 Pages
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AD9148
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Typical Signal Chain......................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
DC Specifications ......................................................................... 5
Input/Output Signal Specifications............................................ 6
Digital Input Data Timing Specifications ................................. 7
AC Specifications.......................................................................... 8
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
Maximum Safe Power Dissipation ............................................. 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 11
Typical Performance Characteristics ........................................... 15
Terminology .................................................................................... 21
Serial Peripheral Interface ............................................................. 22
General Operation of the Serial Interface ............................... 22
Data Format ................................................................................ 22
SPI Pin Descriptions .................................................................. 22
SPI Options ................................................................................. 23
SPI Register Map............................................................................. 24
SPI Register Descriptions .......................................................... 26
Input Data Ports.............................................................................. 40
Dual-Port Mode.......................................................................... 40
Single-Port Mode........................................................................ 40
Byte Mode.................................................................................... 41
Data Interface Options .............................................................. 41
Recommended Frame Input Bias Circuitry............................ 41
FIFO Operation .............................................................................. 42
Synchronizing and Resetting the FIFO ................................... 43
Monitoring the FIFO Status ...................................................... 44
Device Synchronization ................................................................. 45
Data Sheet
Synchronizing Multiple Devices .............................................. 45
Synchronization with Clock Multiplication ............................... 45
Synchronization with Direct Clocking.................................... 47
Additional Synchronization Features ...................................... 48
Interface Timing ............................................................................. 49
Digital Data Path ............................................................................ 50
Premodulation ............................................................................ 50
Programmable Inverse Sinc Filter ............................................ 50
Interpolation Filters ................................................................... 51
Fine Modulation ......................................................................... 54
Quadrature Phase Correction................................................... 55
DC Offset Correction ................................................................ 55
Digital Gain Control .................................................................. 55
Clock Generation ........................................................................... 56
DAC Input Clock Configurations ............................................ 56
Driving the CLK_x and REFCLK_x Inputs............................ 56
Direct Clocking .......................................................................... 56
Clock Multiplication .................................................................. 57
Analog Outputs............................................................................... 59
Transmit DAC Operation.......................................................... 59
Auxiliary DAC Operation ......................................................... 60
Interfacing to Modulators ......................................................... 61
Device Power Dissipation.............................................................. 63
Temperature Sensor ....................................................................... 65
Interrupt Request Operation ........................................................ 66
Interrupt Service Routine.......................................................... 66
Interface Timing Validation .......................................................... 67
SED Operation............................................................................ 67
SED Example .............................................................................. 67
Example Start-Up Routine ............................................................ 68
Derived PLL Settings ................................................................. 68
Derived NCO Settings ............................................................... 68
Start-Up Sequence...................................................................... 68
Device Verification Sequence ................................................... 68
Outline Dimensions ....................................................................... 69
Ordering Guide .......................................................................... 70
Rev. B | Page 2 of 72
 

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