Data Sheet
AD9106
POWER SUPPLY VOLTAGE INPUTS AND POWER DISSIPATION
Table 8.
Parameter
ANALOG SUPPLY VOLTAGES
AVDD1, AVDD2
CLKVDD
CLDO
DIGITAL SUPPLY VOLTAGES
DVDD
DLDO1, DLDO2
POWER CONSUMPTION
fDAC = 180 MSPS, Pure CW Sine Wave
IAVDD
IDVDD
DDS Only
RAM Only
DDS and RAM Only
ICLKVDD
Power-Down Mode
POWER CONSUMPTION
fDAC = 180 MSPS, Pure CW Sine Wave
IAVDD
IDVDD
IDLDO2
DDS Only
RAM Only
DDS and RAM Only—50% Duty Cycle Sine
Wave Output
IDLDO1
ICLKVDD
ICLDO
Power-Down Mode
Test Conditions/Comments
On-chip LDO not in use
On-chip LDO not in use
AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, internal CLDO, DLDO1,
and DLDO2
12.5 MHz (DDS only), all four DACs
CW sine wave output
50% duty cycle FS pulse output
50% duty cycle sine wave output
REF_PDN = 0, DACs sleep, CLK power down, external CLK, and
supplies on
AVDD = 1.8 V, DVDD = DLDO1 = DLDO2 = 1.8 V, CLKVDD = CLDO =
1.8 V
12.5 MHz (DDS only)
CW sine wave output
50% duty cycle FS pulse output
REF_PDN = 0, DACs sleep, CLK power down, external CLK, and
supplies on
Min Typ
1.7
1.7
1.7
1.7
1.7
Max Unit
3.6 V
3.6 V
1.9 V
3.6 V
1.9 V
315.25
mW
28.51
mA
60.3
mA
27.1
mA
39.75
mA
6.72
mA
4.73
mW
167
mW
28.14
mA
0.151
mA
53.75
mA
17.78
mA
35.4
mA
4.0
mA
0.0096
mA
6.6
mA
1.49
mW
Rev. A | Page 9 of 48