Data Sheet
AD9106
DC SPECIFICATIONS (1.8 V)
TMIN to TMAX, AVDD = 1.8 V, DVDD = DLDO1 = DLDO2 = 1.8 V, CLKVDD = CLDO = 1.8 V, IOUTFS = 4 mA, maximum sample rate, unless
otherwise noted.
Table 2.
Parameter
RESOLUTION
ACCURACY at 1.8 V
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
DAC OUTPUTS
Offset Error
Gain Error Internal Reference—No Automatic IOUTFS Calibration
Full-Scale Output Current1 at 1.8 V
Output Resistance
Output Compliance Voltage
Crosstalk, DAC to DAC (fOUT = 30 MHz)
Crosstalk, DAC to DAC (fOUT = 60 MHz)
DAC TEMPERATURE DRIFT
Gain
Reference Voltage
REFERENCE OUTPUT
Internal Reference Voltage with AVDD = 1.8 V
Output Resistance
REFERENCE INPUT
Voltage Compliance
Input Resistance External, Reference Mode
DAC MATCHING
Gain Matching—No Automatic IOUTFS Calibration
1 Based on use of 8 kΩ external xRSET resistors.
Min
Typ
Max Unit
12
Bits
±0.4
LSB
±0.4
LSB
±.00025
% of FSR
−1.0
+1.0 % of FSR
2
4
4
mA
200
MΩ
−0.5
+1.0 V
94
dB
78
dB
±228
±131
ppm/°C
ppm/°C
0.8
1.0
1.2
V
10
kΩ
0.1
1
1.25 V
MΩ
±0.75
% of FSR
Rev. A | Page 5 of 48