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AD2S93AP View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD2S93AP
ADI
Analog Devices ADI
AD2S93AP Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD2S93
LOS
OVR
UNR
SIGN
0100
0100
0100
0000
0000
0001
0001
0001
0001
0011
0011
0011
OUTPUT CODES
MAGNITUDE
0000
0000
1111
0000
0000
1111
0000
0000
1111
0000
0000
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
1111
0000
0001
+VE POSITION
FULL SCALE
1111
0000
0001
NULL
POSITION
1110
1111
0000
0001
–VE POSITION
FULL SCALE
1111
A – B = + REF/2
A–B=0
A – B = – REF/2
UNDER-
RANGE
–1
RANGE
OVER-
RANGE
0
≠1
RATIO OF A- B/REF/2
Figure 2. Output Code Format
If the maximum operating stroke of an LVDT yielded a 1 V rms
A–B output, the weighting of the LVDT to AD2S93 digital out-
put would be:
Input Signal Full Scale
Full-Scale Operating Range (± 212 )
1×2 2
213
Input Scaling = 345 µV/LSB
This can be equated directly to the LVDT sensitivity specifica-
tion in mm/v/v.
Note: The overrange and underrange quadrants can be utilized
by decoding the overrange and underrange MSBs and decoding
the 12 magnitude bits. This will increase the operating range of
the AD2S93 accordingly. However, if the input A–B > VREF
then the converter will lose track of the input and will only re-
gain track when the input signal returns to within the operating
range of the converter.
INPUT GAIN
Since the transformation ratio of an LVDT or RVDT from exci-
tation voltage to signal voltage can be 1:0.15, provision for gain
scaling has been provided. The gain can, therefore, be selected
to ensure that the full-scale output of converter represents the
maximum stroke position of the transducer.
The gain setting is accomplished by connecting Pin 2, (DIFF)
and Pin 3 (GAIN) together (unity gain) or connecting two resis-
tors as shown in Figure 3.
The gain of the input stage is calculated using the following
equation:
DIFF ( A B) = 1 + R3
( A B) IN
R4
e.g., For a gain of 5, R3 = 12 k, R4 = 3 k
For a gain of 10, R3 = 18 k, R4 = 2 k
A
B
R4
AGND
GAIN
R3
DIFF
Figure 3. Pre-Amp Gain Block
SETTING THE CONVERTER BANDWIDTH
The AD2S93 bandwidth is set by placing three external compo-
nents, C1, C2, and R2, around the integrator as illustrated by
the figure below.
C1
R2
C2
THI
R1
INT
CV
RV
VCO
62.5
THO
Figure 4. Integrator and VCO
Before the bandwidth can be set, the corresponding VCO gain
setting must be determined. The VCO gain is directly related to
the slew rate of the converter. This is set internally to two dif-
ferent rates defined internally by RV.
Typical converter slew rates are defined below,
G (1) = 2400 LSB/msMode 1
G (2) = 800 LSB/msMode 2
–6–
REV. A
 

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