AD1385
GAIN ADJUST (Pin 40)
The internal reference of the AD1385 may be adjusted by vary-
ing the voltage applied to the Gain Adjust pin. The input im-
pedance of this pin is nominally 20 kΩ, with a tolerance of
± 20%. A change of 1 V on Pin 40 will change the reference volt-
age by about 10 mV. The reference may be adjusted by ±150 mV
without degrading the AD1385’s performance. The simplest
method of implementing the gain adjust is to connect a potenti-
ometer between the ± 15 V supplies, with the wiper connected to
the Gain Adjust pin. Care should be taken to ensure that noise
does not enter the ADC through the Gain Adjust pin.
Figure 25a. AD1385 Gain Adjust Circuit
OFFSET ADJUST (Pin 29)
The ADC’s offset voltage may be adjusted by means of a voltage
applied to the Offset Adjust pin. The nominal adjustment sensi-
tivity is 0.005% FSR/V. The input impedance is 20 kΩ with a
± 20% tolerance. The simplest way to implement the offset ad-
just is to connect a potentiometer between the ± 15 V supplies,
with the wiper connected to the Offset Adjust pin. Care should
be taken to ensure that noise does not enter the ADC through
the Offset Adjust pin.
Figure 25b. AD1385 Offset Adjust Circuit
APPLICATIONS
Mounting and Thermal Considerations
The AD1385’s operation is specified over a case temperature
range of –55°C to +125°C. Case temperature in still air is nor-
mally about 20°C above ambient, and a heat sink and/or air flow
is required to guarantee specified performance when high ambi-
ent temperatures are expected. A thin heat transfer plate,
mounted beneath the package to conduct heat into the ground
plane, may be sufficient. This plate may be made of metal pro-
vided care is taken to prevent shorting the package pins. An
excellent alternative is to use an elastomeric heat conducting
material. These materials will conform to the board and to the
AD1385 package to improve heat transfer while reducing me-
chanical stress. Elastomeric materials normally will not require
thermally conductive grease.
Testing the AD1385
It is difficult to test the AD1385 with ordinary test methods be-
cause of the part’s very low distortion and noise. The number of
output codes and the nature of the analog to digital conversion
make static tests of performance especially cumbersome. Sub-
ranging converters with error correction circuitry can have flaws
at any place in their transfer function and all codes must be ex-
ercised for a complete test.
Histograms provide a convenient way to measure all codes in a
modest amount of time. Even histograms can be slow, when 20
million conversions (40 seconds) may be required to achieve
statistically valid results.
Dynamic tests based on FFTs are the most powerful. They
quantify noise and distortion as a function of input frequency.
From them one can infer qualitative integral and differential
nonlinearity performance while determining the ADC’s specific
dynamic performance. FFTs are especially useful for systems
which require excellent dynamic response, such as magnetic
resonance imaging. They also uncover performance problems
that don’t show up in static tests of linearity.
The difficulty in doing FFT tests stems from the requirement
for ultra pure sine wave inputs at various frequencies over the
operating bandwidth of the ADC. Even the best available gen-
erators are not capable of supplying signals with sufficiently low
noise and low distortion for testing the AD1385. Few generators
permit phase-locking to the ADC clock. (Phase-locking makes it
possible to obtain an integral number of cycles of the input sine
wave within the FFT data window, which in turn eliminates the
need for windowing functions and the spectral spreading they
cause.)
The best generator currently available for this purpose is the
Bru¨ el and Kjaer Model 1051 (or 1049). This generator provides
a programmable output frequency up to 250 kHz with better
than 0.001 Hz resolution. The generator’s distortion perfor-
mance at frequencies below 20 kHz is better than the AD1385
but degrades at 100 kHz and higher. Noise is a problem at all
frequencies, being about –85 dB over the AD1385’s bandwidth.
Both noise and distortion can be reduced to acceptable levels
with filters. Passive narrow bandwidth filters will reduce har-
monic distortion to less than –100 dB. Inductors wound on
large pot cores with air gaps can be made quite linear, and with
careful winding will provide low loss and low capacitance. Such
filters will reduce noise to negligible levels outside their pass
band to provide a much better view of actual ADC performance.
The effect of aperture jitter, for example, cannot be observed
without a filter.
The FFTs shown in Figures 3-12 were produced using these
methods. These tests are done as a normal part of production
testing to guarantee the dynamic performance of the AD1385.
Multiplexing and High Impedance Inputs
Multiplexing the AD1385’s input presents several challenges in
component selection. The ON-resistance of most available mul-
tiplexers and switches is a function of the applied voltage. This,
coupled with the AD1385’s 2.5 kΩ input resistance, can intro-
duce significant harmonic distortion unless the multiplexer out-
put is buffered. All monolithic switches and multiplexers exhibit
this behavior to some extent, with CMOS-based designs gener-
ally worse than those using JFET technology.
An acceptable alternative is the DG180 family produced by
Siliconix. These hybrid switches use discrete JFET pass devices
to provide an extremely low ON-resistance virtually indepen-
dent of signal level. Care should be taken to match the switch’s
common-mode signal capability with operating range desired for
the AD1385. The finite on-resistance of any unbuffered switch
driving the AD1385 will introduce a gain error, and that error
may change appreciably over temperature.
REV. 0
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