A42MX09-3CQG84 View Datasheet(PDF) - Microsemi Corporation

Part Name

Description

Manufacturer

A42MX09-3CQG84

40MX and 42MX FPGA Families

Microsemi Corporation 

40MX and 42MX FPGA Families

provides capability to quickly design memory functions with the SRAM blocks. Unused SRAM blocks can

be used to implement registers for other user logic within the design.

7 Inputs

Hard-Wire to I/O

Programmable

Inverter

Feedback to Array

Figure 1-4 • A42MX24 and A42MX36 D-Module Implementation

WD[7:0]

Latches

[7:0]

WRAD[5:0]

Latches

[5:0]

Write SRAM Module Read

Port 32 x 8 or 64 x 4 Port

[5:0] Logic (256 Bits)

Logic

RDAD[5:0]

Latches

Read

Logic

REN

MODE

BLKEN

WEN

WCLK

Write

Logic

RD[7:0]

Routing Tracks

RCLK

Figure 1-5 • A42MX36 Dual-Port SRAM Block

Routing Structure

The MX architecture uses vertical and horizontal routing tracks to interconnect the various logic and I/O

modules. These routing tracks are metal interconnects that may be continuous or split into segments.

Varying segment lengths allow the interconnect of over 90% of design tracks to occur with only two

antifuse connections. Segments can be joined together at the ends using antifuses to increase their

lengths up to the full length of the track. All interconnects can be accomplished with a maximum of four

antifuses.

Horizontal Routing

Horizontal routing tracks span the whole row length or are divided into multiple segments and are located

in between the rows of modules. Any segment that spans more than one-third of the row length is

considered a long horizontal segment. A typical channel is shown in Figure 1-6. Within horizontal routing,

dedicated routing tracks are used for global clock networks and for power and ground tie-off tracks. Non-

dedicated tracks are used for signal nets.

Vertical Routing

Another set of routing tracks run vertically through the module. There are three types of vertical tracks:

input, output, and long. Long tracks span the column length of the module, and can be divided into

multiple segments. Each segment in an input track is dedicated to the input of a particular module; each

segment in an output track is dedicated to the output of a particular module. Long segments are

1-4

Revision 11

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